[llvm-commits] [llvm] r98768 - /llvm/trunk/lib/Target/ARM/ARMInstrFormats.td

[Bob Wilson]

Author: bwilson
Date: Wed Mar 17 16:13:43 2010
New Revision: 98768

URL: http://llvm.org/viewvc/llvm-project?rev=98768&view=rev
Log:
Increase format field from 5 to 6 bits.  ARMII::FormMask was increased to 0x3f
in svn r74988 but the format field was never widened.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=98768&r1=98767&r2=98768&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Mar 17 16:13:43 2010
@@ -15,8 +15,8 @@
 // Format specifies the encoding used by the instruction.  This is part of the
 // ad-hoc solution used to emit machine instruction encodings by our machine
 // code emitter.
-class Format<bits<5> val> {
-  bits<5> Value = val;
+class Format<bits<6> val> {
+  bits<6> Value = val;
 }
 
 def Pseudo        : Format<0>;
@@ -183,7 +183,7 @@
   bits<2> IndexModeBits = IM.Value;
   
   Format F = f;
-  bits<5> Form = F.Value;
+  bits<6> Form = F.Value;
 
   Domain D = d;
   bits<2> Dom = D.Value;