[llvm-commits] [llvm] r96969 - in /llvm/trunk: ./ autoconf/ include/llvm/ADT/ lib/Support/ lib/Target/MBlaze/ lib/Target/MBlaze/AsmPrinter/ lib/Target/MBlaze/TargetInfo/ test/CodeGen/MBlaze/

[Jakob Stoklund Olesen]

On Feb 23, 2010, at 11:15 AM, Wesley Peck wrote:

> +// MBlaze 32-bit (aliased) FPU Registers
> +class FPR<bits<5> num, string n, list<Register> subregs>
> +  : MBlazeRegWithSubRegs<n, subregs> {
> +  let Num = num;
> +}

It is probably better to model "F0 aliases R0" than "R0 is a subreg of F0". I don't think any of the sub-register operations make sense here.

Alternatively, you could even stick the same registers in multiple register classes with different types. Look at the PowerPC F8RC and F4RC register classes.

/jakob