[llvm-commits] [llvm] r96757 - /llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp

[Chris Lattner]

Author: lattner
Date: Sun Feb 21 14:53:45 2010
New Revision: 96757

URL: http://llvm.org/viewvc/llvm-project?rev=96757&view=rev
Log:
Always emit register class id references as i32 like
DAGISelEmitter does.  This fixes 11 arm failures (8 
left).

Modified:
    llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp

Modified: llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp?rev=96757&r1=96756&r2=96757&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp Sun Feb 21 14:53:45 2010
@@ -535,7 +535,7 @@
     // in COPY_TO_SUBREG instructions.
     if (DI->getDef()->isSubClassOf("RegisterClass")) {
       std::string Value = getQualifiedName(DI->getDef()) + "RegClassID";
-      AddMatcherNode(new EmitStringIntegerMatcherNode(Value, N->getTypeNum(0)));
+      AddMatcherNode(new EmitStringIntegerMatcherNode(Value, MVT::i32));
       ResultOps.push_back(NextRecordedOperandNo++);
       return;
     }