[llvm-commits] [llvm] r96023 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

[Evan Cheng]

Author: evancheng
Date: Fri Feb 12 16:17:21 2010
New Revision: 96023

URL: http://llvm.org/viewvc/llvm-project?rev=96023&view=rev
Log:
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.

Modified:
    llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=96023&r1=96022&r2=96023&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Feb 12 16:17:21 2010
@@ -350,7 +350,8 @@
       : ARMRegisterInfo::getRegisterNumbering(Reg);
     // AM4 - register numbers in ascending order.
     // AM5 - consecutive register numbers in ascending order.
-    if (NewOffset == Offset + (int)Size &&
+    if (Reg != ARM::SP &&
+        NewOffset == Offset + (int)Size &&
         ((isAM4 && RegNum > PRegNum) || RegNum == PRegNum+1)) {
       Offset += Size;
       PRegNum = RegNum;