[llvm-commits] [llvm] r94019 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelDAGToDAG.cpp

[Bill Wendling]

On Jan 20, 2010, at 12:13 PM, David Greene wrote:

> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=94019&r1=94018&r2=94019&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 20 14:13:31 2010
> @@ -5172,6 +5172,7 @@
>   // count of outstanding operands.
>   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
>     SDNode *N = I++;
> +    checkForCycles(N);
>     unsigned Degree = N->getNumOperands();
>     if (Degree == 0) {
>       // A node with no uses, add it to the result array immediately.
> @@ -5191,6 +5192,7 @@
>   // such that by the time the end is reached all nodes will be sorted.
>   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
>     SDNode *N = I;
> +    checkForCycles(N);
>     // N is in sorted position, so all its uses have one less operand
>     // that needs to be sorted.
>     for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
> @@ -5216,7 +5218,7 @@
>       SDNode *S = ++J;
>       dbgs() << "Offending node:\n";
>       S->dumprFull();
> -      assert(I != SortedPos && "Overran sorted position");
> +      assert(0 && "Overran sorted position");
>     }
Hi David,

Thanks, but I still think this is wrong for non-Assert modes. Here's a suggested alternative:

    if (I == SortedPos) {
#ifndef NDEBUG
      SDNode *S = ++I;
      dbgs() << "Overran sorted position:\n"
      S->dumprFull();
#endif
      llvm_unreachable(0);
    }

I think that this maintains what you're trying to accomplish there, and it will work for both Assert and Release modes.

-bw