[llvm-commits] [llvm] r91961 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Bill Wendling isanbard at gmail.com
Tue Dec 22 16:47:20 PST 2009


Author: void
Date: Tue Dec 22 18:47:20 2009
New Revision: 91961

URL: http://llvm.org/viewvc/llvm-project?rev=91961&view=rev
Log:
Remove node ordering from inline asm nodes. It's not needed.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=91961&r1=91960&r2=91961&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Dec 22 18:47:20 2009
@@ -5868,8 +5868,6 @@
         Chain = DAG.getStore(Chain, getCurDebugLoc(),
                              OpInfo.CallOperand, StackSlot, NULL, 0);
         OpInfo.CallOperand = StackSlot;
-        if (DisableScheduling)
-          DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
       }
 
       // There is no longer a Value* corresponding to this operand.
@@ -5877,9 +5875,6 @@
 
       // It is now an indirect operand.
       OpInfo.isIndirect = true;
-
-      if (DisableScheduling)
-        DAG.AssignOrdering(OpInfo.CallOperand.getNode(), SDNodeOrder);
     }
 
     // If this constraint is for a specific register, allocate it before
@@ -6101,9 +6096,6 @@
                       &AsmNodeOperands[0], AsmNodeOperands.size());
   Flag = Chain.getValue(1);
 
-  if (DisableScheduling)
-    DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
-
   // If this asm returns a register value, copy the result from that register
   // and set it as the value of the call.
   if (!RetValRegs.Regs.empty()) {
@@ -6132,9 +6124,6 @@
       }
 
       assert(ResultType == Val.getValueType() && "Asm result value mismatch!");
-
-      if (DisableScheduling)
-        DAG.AssignOrdering(Val.getNode(), SDNodeOrder);
     }
 
     setValue(CS.getInstruction(), Val);
@@ -6164,17 +6153,12 @@
                                getValue(StoresToEmit[i].second),
                                StoresToEmit[i].second, 0);
     OutChains.push_back(Val);
-    if (DisableScheduling)
-      DAG.AssignOrdering(Val.getNode(), SDNodeOrder);
   }
 
   if (!OutChains.empty())
     Chain = DAG.getNode(ISD::TokenFactor, getCurDebugLoc(), MVT::Other,
                         &OutChains[0], OutChains.size());
 
-  if (DisableScheduling)
-    DAG.AssignOrdering(Chain.getNode(), SDNodeOrder);
-
   DAG.setRoot(Chain);
 }
 





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