[llvm-commits] [llvm] r89814 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/BranchFolding.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h

Evan Cheng evan.cheng at apple.com
Tue Nov 24 15:40:22 PST 2009


You can look at the output of llc -stats. That tells you the number of instructions, which is a better indication of code size change.

Evan

On Nov 24, 2009, at 3:35 PM, Bob Wilson wrote:

> Author: bwilson
> Date: Tue Nov 24 17:35:49 2009
> New Revision: 89814
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=89814&view=rev
> Log:
> Refactor target hook for tail duplication as requested by Chris.
> Make tail duplication of indirect branches much more aggressive (for targets
> that indicate that it is profitable), based on further experience with
> this transformation.  I compiled 3 large applications with and without
> this more aggressive tail duplication and measured minimal changes in code
> size.  ("size" on Darwin seems to round the text size up to the nearest
> page boundary, so I can only say that any code size increase was less than
> one 4k page.) Radar 7421267.
> 
> Modified:
>    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
>    llvm/trunk/lib/CodeGen/BranchFolding.cpp
>    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
>    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
> 
> Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=89814&r1=89813&r2=89814&view=diff
> 
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Tue Nov 24 17:35:49 2009
> @@ -544,12 +544,9 @@
>   virtual unsigned getInlineAsmLength(const char *Str,
>                                       const MCAsmInfo &MAI) const;
> 
> -  /// TailDuplicationLimit - Returns the limit on the number of instructions
> -  /// in basic block MBB beyond which it will not be tail-duplicated.
> -  virtual unsigned TailDuplicationLimit(const MachineBasicBlock &MBB,
> -                                        unsigned DefaultLimit) const {
> -    return DefaultLimit;
> -  }
> +  /// isProfitableToDuplicateIndirectBranch - Returns true if tail duplication
> +  /// is especially profitable for indirect branches.
> +  virtual bool isProfitableToDuplicateIndirectBranch() const { return false; }
> };
> 
> /// TargetInstrInfoImpl - This is the default implementation of
> 
> Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=89814&r1=89813&r2=89814&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
> +++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Tue Nov 24 17:35:49 2009
> @@ -1043,9 +1043,18 @@
>   // of one less than the tail-merge threshold. When optimizing for size,
>   // duplicate only one, because one branch instruction can be eliminated to
>   // compensate for the duplication.
> -  unsigned MaxDuplicateCount =
> -    MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize) ?
> -    1 : TII->TailDuplicationLimit(*TailBB, TailMergeSize - 1);
> +  unsigned MaxDuplicateCount;
> +  if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
> +    MaxDuplicateCount = 1;
> +  else if (TII->isProfitableToDuplicateIndirectBranch() &&
> +           !TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
> +    // If the target has hardware branch prediction that can handle indirect
> +    // branches, duplicating them can often make them predictable when there
> +    // are common paths through the code.  The limit needs to be high enough
> +    // to allow undoing the effects of tail merging.
> +    MaxDuplicateCount = 20;
> +  else
> +    MaxDuplicateCount = TailMergeSize - 1;
> 
>   // Check the instructions in the block to determine whether tail-duplication
>   // is invalid or unlikely to be profitable.
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=89814&r1=89813&r2=89814&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Nov 24 17:35:49 2009
> @@ -1027,14 +1027,10 @@
>   return TargetInstrInfoImpl::isIdentical(MI0, MI1, MRI);
> }
> 
> -unsigned ARMBaseInstrInfo::TailDuplicationLimit(const MachineBasicBlock &MBB,
> -                                                unsigned DefaultLimit) const {
> +bool ARMBaseInstrInfo::isProfitableToDuplicateIndirectBranch() const {
>   // If the target processor can predict indirect branches, it is highly
>   // desirable to duplicate them, since it can often make them predictable.
> -  if (!MBB.empty() && isIndirectBranchOpcode(MBB.back().getOpcode()) &&
> -      getSubtarget().hasBranchTargetBuffer())
> -    return DefaultLimit + 2;
> -  return DefaultLimit;
> +  return getSubtarget().hasBranchTargetBuffer();
> }
> 
> /// getInstrPredicate - If instruction is predicated, returns its predicate
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=89814&r1=89813&r2=89814&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Tue Nov 24 17:35:49 2009
> @@ -291,8 +291,7 @@
>   virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other,
>                            const MachineRegisterInfo *MRI) const;
> 
> -  virtual unsigned TailDuplicationLimit(const MachineBasicBlock &MBB,
> -                                        unsigned DefaultLimit) const;
> +  virtual bool isProfitableToDuplicateIndirectBranch() const;
> };
> 
> static inline
> 
> 
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