[llvm-commits] [PATCH] More Spill Annotations

Evan Cheng evan.cheng at apple.com
Tue Nov 24 11:59:24 PST 2009


On Nov 24, 2009, at 11:48 AM, David Greene wrote:

> On Tuesday 24 November 2009 13:43, Evan Cheng wrote:
> 
>>> I was thinking of doing this by having TableGen infer isVector flags on
>>> instructions and operands from the type.  If an operand has a vector
>>> type, set the isVector flag on the operand.  If an instruction has any
>>> operands with isVector set, set isVector on the instruction.  The user
>>> can then override these assumptions in the .td file by setting "let
>>> scalar=1" or "let vector=1."
>> 
>> That's reasonable. But I think we should let tablegen infer a lot more
>> information. For every instruction with matching pattern it should save the
>> SDNode opcode. So for ADD64*, ADDPS*, etc. we know they are all ISD::ADD
>> instructions. Similarly we can save the ValueType information and infer
>> properties such as isVector.
>> 
>> Such information will let codegen do all kinds of interesting optimizations
>> and give us some truly rich asm comments.
> 
> Yes, that would be cool.  I have wanted type information at the MachineInstr
> level for some time now.  Do you imagine extending the Instruction and Operand
> classes in Target.td and then having TableGen fill in those bits?

Only on instruction level, not at the operand level. Also note the information is imprecise. Now that I think about it, I am not sure adding ValueType to TargetInstrDesc makes sense since it would be a many (types) to one mapping. But perhaps properties like bitwidth, isVector make sense.

I don't think we need to add anything to Target.td. We just need to enhance TargetInstrDesc and have InstrInfoEmitter fill in the information.

Evan

> 
>>> I'm not sure how target-specific comments would work.  Do you have an
>>> example in mind?  I want to avoid having to mark every vector instruction
>>> as the information can be inferred for 90% of the cases.
>> 
>> I am not sure either. It seems to me you are adding asm comments that many
>> targets might not care about. Perhaps tablegen can infer some information
>> and  attach it as asm comment string to each TargetInstrDesc entry?
> 
> That could be useful.  Something as generic as "Vector Spill" or "Scalar 
> Spill" isn't terribly target-specific but I could certainly imagine a time
> where we'll want very target-specific asm comments.
> 
>                                    -Dave





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