[llvm-commits] Instruction fixes

[Sean Callanan]

During the testing of the disassembler, I encountered many  
instructions that were missing, malformed, had missing forms, or had  
missing qualifiers.  I went through and added these to the instruction  
tables, and fixed the test cases as needed.

This patch affects no patterns.  It only addresses assembly, operand  
width (in certain cases) and cosmetic/style issues.

Please find the patch attached.  It has received a preliminary vetting  
from Eric Christopher <echristo at apple.com>, and I am now submitting it  
for inclusion into LLVM proper.

The change log is below.

Sean

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2009-11-19  Sean Callanan <scallanan at apple.com>
	* X86Instr64bit.td
		(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
			Added
		(CALL, CMOV) Added qualifiers
		(JMP) Added PC-relative jump instruction
		(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
			that it is 64-bit only (ambiguous since it has no
			REX prefix)
		(MOV) Added rr form going the other way, which is encoded
			differently
		(MOV) Changed immediates to offsets, which is more correct;
			also fixed MOV64o64a to have to a 64-bit offset
		(MOV) Fixed qualifiers
		(MOV) Added debug-register and condition-register moves
		(MOVZX) Added more forms
		(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
			(as with MOV) are encoded differently
		(ROL) Made REX.W required
		(BT) Uncommented mr form for disassembly only
		(CVT__2__) Added several missing non-intrinsic forms
		(LXADD, XCHG) Reordered operands to make more sense for
			MRMSrcMem
		(XCHG) Added register-to-register forms
		(XADD, CMPXCHG, XCHG) Added non-locked forms
	* X86InstrSSE.td
		(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
			Added
	* X86InstrFPStack.td
		(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
                  FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1,  
FYL2X,
                  FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP,  
FPREM,
                  FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
		 FXRSTOR)
			Added
		(FCOM, FCOMP) Added qualifiers
		(FSTENV, FSAVE, FSTSW) Fixed opcode names
		(FNSTSW) Added implicit register operand
	* X86InstrInfo.td
		(opaque512mem) Added for FXSAVE/FXRSTOR
		(offset8, offset16, offset32, offset64) Added for MOV
		(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
		 LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
		 LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
		 LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
		 CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
		 SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
		 VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
		 VMWRITE, VMXOFF, VMXON) Added
		(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
		(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
		 JGE, JLE, JG, JCXZ) Added qualifier; added 32-bit forms
		(MOV) Changed some immediate forms to offset forms
		(MOV) Added reversed reg-reg forms, which are encoded
			differently
		(MOV) Added debug-register and condition-register moves
		(CMOV) Added qualifiers
		(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
		(BT) Uncommented memory-register forms for disassembler
		(MOVSX, MOVZX) Added forms
		(XCHG, LXADD) Made operand order make sense for MRMSrcMem
		(XCHG) Added register-register forms
		(XADD, CMPXCHG) Added unlocked forms
	* X86InstrMMX.td
		(MMX_MOVD, MMV_MOVQ) Added forms
	* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
		change

	* X86RegisterInfo.td: Added debug and condition register sets
	* if-tail-dup.ll: Fixed testcase to reflect jump qualifier
	* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
	* peep-test-3.ll: Fixed testcase to reflect test qualifier
	* cmov.ll: Fixed testcase to reflect cmov and jump qualifiers
	* loop-blocks.ll: Fixed testcase to reflect call qualifier
	* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
	* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
	  qualifier
	* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
	* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
	* tail-opts.ll: Fixed testcase to reflect jump and call qualifiers
	* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
	* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
	* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
	* widen_load-1.ll: Fixed testcase to reflect call qualifier