[llvm-commits] [llvm] r87022 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/
Evan Cheng
evan.cheng at apple.com
Thu Nov 12 17:00:54 PST 2009
Why is this necessary? As of 84326 each StackObject already has a
isSpillSlot bool field.
Evan
On Nov 12, 2009, at 12:49 PM, David Greene wrote:
> Author: greened
> Date: Thu Nov 12 14:49:22 2009
> New Revision: 87022
>
> URL: http://llvm.org/viewvc/llvm-project?rev=87022&view=rev
> Log:
>
> Add a bool flag to StackObjects telling whether they reference spill
> slots. The AsmPrinter will use this information to determine
> whether to
> print a spill/reload comment.
>
> Remove default argument values. It's too easy to pass a wrong
> argument
> value when multiple arguments have default values. Make everything
> explicit to trap bugs early.
>
> Update all targets to adhere to the new interfaces..
>
> Modified:
> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
> llvm/trunk/lib/CodeGen/MachineFunction.cpp
> llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
> llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
> llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
> llvm/trunk/lib/CodeGen/VirtRegMap.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
> llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp
> llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
> llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
> llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
> llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
> llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
> llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
> llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
> llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86FastISel.cpp
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
> llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
> llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Thu Nov 12
> 14:49:22 2009
> @@ -15,9 +15,11 @@
> #define LLVM_CODEGEN_MACHINEFRAMEINFO_H
>
> #include "llvm/ADT/BitVector.h"
> -#include "llvm/ADT/DenseSet.h"
> +#include "llvm/ADT/DenseMap.h"
> +#include "llvm/ADT/SmallVector.h"
> #include "llvm/System/DataTypes.h"
> #include <cassert>
> +#include <limits>
> #include <vector>
>
> namespace llvm {
> @@ -106,8 +108,8 @@
> // cannot alias any other memory objects.
> bool isSpillSlot;
>
> - StackObject(uint64_t Sz, unsigned Al, int64_t SP = 0, bool IM =
> false,
> - bool isSS = false)
> + StackObject(uint64_t Sz, unsigned Al, int64_t SP, bool IM,
> + bool isSS)
> : SPOffset(SP), Size(Sz), Alignment(Al), isImmutable(IM),
> isSpillSlot(isSS) {}
> };
> @@ -182,6 +184,10 @@
> /// CSIValid - Has CSInfo been set yet?
> bool CSIValid;
>
> + /// SpillObjects - A vector indicating which frame indices refer to
> + /// spill slots.
> + SmallVector<bool, 8> SpillObjects;
> +
> /// MMI - This field is set (via setMachineModuleInfo) by a module
> info
> /// consumer (ex. DwarfWriter) to indicate that frame layout
> information
> /// should be acquired. Typically, it's the responsibility of the
> target's
> @@ -192,6 +198,7 @@
> /// TargetFrameInfo - Target information about frame layout.
> ///
> const TargetFrameInfo &TFI;
> +
> public:
> explicit MachineFrameInfo(const TargetFrameInfo &tfi) : TFI(tfi) {
> StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;
> @@ -341,7 +348,7 @@
> /// index with a negative value.
> ///
> int CreateFixedObject(uint64_t Size, int64_t SPOffset,
> - bool Immutable = true);
> + bool Immutable, bool isSS);
>
>
> /// isFixedObjectIndex - Returns true if the specified index
> corresponds to a
> @@ -374,13 +381,31 @@
> return Objects[ObjectIdx+NumFixedObjects].Size == ~0ULL;
> }
>
> - /// CreateStackObject - Create a new statically sized stack
> object, returning
> - /// a nonnegative identifier to represent it.
> + /// CreateStackObject - Create a new statically sized stack object,
> + /// returning a nonnegative identifier to represent it.
> ///
> - int CreateStackObject(uint64_t Size, unsigned Alignment, bool
> isSS = false) {
> + int CreateStackObject(uint64_t Size, unsigned Alignment, bool
> isSS) {
> assert(Size != 0 && "Cannot allocate zero size stack objects!");
> Objects.push_back(StackObject(Size, Alignment, 0, false, isSS));
> - return (int)Objects.size()-NumFixedObjects-1;
> + int Index = (int)Objects.size()-NumFixedObjects-1;
> + assert(Index >= 0 && "Bad frame index!");
> + if (SpillObjects.size() <= static_cast<unsigned>(Index))
> + SpillObjects.resize(Index+1);
> + SpillObjects[Index] = false;
> + return Index;
> + }
> +
> + /// CreateSpillStackObject - Create a new statically sized stack
> + /// object that represents a spill slot, returning a nonnegative
> + /// identifier to represent it.
> + ///
> + int CreateSpillStackObject(uint64_t Size, unsigned Alignment) {
> + CreateStackObject(Size, Alignment, true);
> + int Index = (int)Objects.size()-NumFixedObjects-1;
> + if (SpillObjects.size() <= static_cast<unsigned>(Index))
> + SpillObjects.resize(Index+1);
> + SpillObjects[Index] = true;
> + return Index;
> }
>
> /// RemoveStackObject - Remove or mark dead a statically sized
> stack object.
> @@ -397,10 +422,20 @@
> ///
> int CreateVariableSizedObject() {
> HasVarSizedObjects = true;
> - Objects.push_back(StackObject(0, 1));
> + Objects.push_back(StackObject(0, 1, 0, false, false));
> return (int)Objects.size()-NumFixedObjects-1;
> }
> -
> +
> + /// isSpillObject - Return whether the index refers to a spill
> slot.
> + ///
> + bool isSpillObject(int Index) const {
> + // Negative indices can't be spill slots.
> + if (Index < 0) return false;
> + assert(static_cast<unsigned>(Index) < SpillObjects.size() &&
> + "Invalid frame index!");
> + return SpillObjects[Index];
> + }
> +
> /// getCalleeSavedInfo - Returns a reference to call saved info
> vector for the
> /// current function.
> const std::vector<CalleeSavedInfo> &getCalleeSavedInfo() const {
>
> Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Thu Nov 12 14:49:22
> 2009
> @@ -441,9 +441,10 @@
> /// index with a negative value.
> ///
> int MachineFrameInfo::CreateFixedObject(uint64_t Size, int64_t
> SPOffset,
> - bool Immutable) {
> + bool Immutable, bool isSS) {
> assert(Size != 0 && "Cannot allocate zero size fixed stack
> objects!");
> - Objects.insert(Objects.begin(), StackObject(Size, 1, SPOffset,
> Immutable));
> + Objects.insert(Objects.begin(), StackObject(Size, 1, SPOffset,
> Immutable,
> + isSS));
> return -++NumFixedObjects;
> }
>
>
> Modified: llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PreAllocSplitting.cpp Thu Nov 12 14:49:22
> 2009
> @@ -341,7 +341,7 @@
> if (I != IntervalSSMap.end()) {
> SS = I->second;
> } else {
> - SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
> + SS = MFI->CreateSpillStackObject(RC->getSize(), RC->getAlignment
> ());
> IntervalSSMap[Reg] = SS;
> }
>
> @@ -957,7 +957,7 @@
> if (I != IntervalSSMap.end()) {
> SS = I->second;
> } else {
> - SS = MFI->CreateStackObject(RC->getSize(), RC->getAlignment());
> + SS = MFI->CreateSpillStackObject(RC->getSize(), RC->getAlignment
> ());
> }
>
> MachineInstr* FMI = TII->foldMemoryOperand(*MBB->getParent(),
>
> Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Thu Nov 12
> 14:49:22 2009
> @@ -264,7 +264,8 @@
> if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex =
> FrameIdx;
> } else {
> // Spill it to the stack where we must.
> - FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot-
> >Offset);
> + FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot-
> >Offset,
> + true, false);
> }
>
> I->setFrameIdx(FrameIdx);
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Thu Nov 12 14:49:22 2009
> @@ -261,8 +261,8 @@
> return SS; // Already has space allocated?
>
> // Allocate a new stack object for this spill location...
> - int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
> - RC-
> >getAlignment(),true);
> + int FrameIdx = MF->getFrameInfo()->CreateSpillStackObject(RC-
> >getSize(),
> + RC-
> >getAlignment());
>
> // Assign the slot...
> StackSlotForVirtReg[VirtReg] = FrameIdx;
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1379,7 +1379,7 @@
> unsigned StackAlign =
> std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
> minAlign);
>
> - int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
> + int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign,
> false);
> return getFrameIndex(FrameIdx, TLI.getPointerTy());
> }
>
> @@ -1395,7 +1395,7 @@
> TD->getPrefTypeAlignment(Ty2));
>
> MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
> - int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
> + int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
> return getFrameIndex(FrameIdx, TLI.getPointerTy());
> }
>
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Thu
> Nov 12 14:49:22 2009
> @@ -305,7 +305,7 @@
> TySize *= CUI->getZExtValue(); // Get total allocated size.
> if (TySize == 0) TySize = 1; // Don't create zero-sized
> stack objects.
> StaticAllocaMap[AI] =
> - MF->getFrameInfo()->CreateStackObject(TySize, Align);
> + MF->getFrameInfo()->CreateStackObject(TySize, Align,
> false);
> }
>
> for (; BB != EB; ++BB)
> @@ -4439,7 +4439,7 @@
> unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
> FTy->getReturnType());
> MachineFunction &MF = DAG.getMachineFunction();
> - int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align,
> false);
> const Type *StackSlotPtrType = PointerType::getUnqual(FTy-
> >getReturnType());
>
> DemoteStackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
> @@ -5276,7 +5276,7 @@
> uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
> unsigned Align = TLI.getTargetData()->getPrefTypeAlignment
> (Ty);
> MachineFunction &MF = DAG.getMachineFunction();
> - int SSFI = MF.getFrameInfo()->CreateStackObject(TySize,
> Align);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(TySize,
> Align, false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy
> ());
> Chain = DAG.getStore(Chain, getCurDebugLoc(),
> OpInfo.CallOperand, StackSlot, NULL, 0);
>
> Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
> +++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Thu Nov 12 14:49:22 2009
> @@ -117,8 +117,8 @@
> assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
> "attempt to assign stack slot to already spilled register");
> const TargetRegisterClass* RC = MF->getRegInfo().getRegClass
> (virtReg);
> - int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
> - RC->getAlignment(), /
> *isSS*/true);
> + int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
> + RC->getAlignment());
> if (LowSpillSlot == NO_STACK_SLOT)
> LowSpillSlot = SS;
> if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
> @@ -161,8 +161,8 @@
> EmergencySpillSlots.find(RC);
> if (I != EmergencySpillSlots.end())
> return I->second;
> - int SS = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
> - RC->getAlignment(), /
> *isSS*/true);
> + int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
> + RC->getAlignment());
> if (LowSpillSlot == NO_STACK_SLOT)
> LowSpillSlot = SS;
> if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -774,7 +774,8 @@
> // Reserve a slot closest to SP or frame pointer.
> const TargetRegisterClass *RC = ARM::GPRRegisterClass;
> RS->setScavengingFrameIndex(MFI->CreateStackObject(RC-
> >getSize(),
> - RC-
> >getAlignment()));
> + RC-
> >getAlignment(),
> + false));
> }
> }
> }
> @@ -791,7 +792,8 @@
> return ARM::LR;
> }
>
> -unsigned ARMBaseRegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> +unsigned
> +ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF)
> const {
> if (STI.isTargetDarwin() || hasFP(MF))
> return FramePtr;
> return ARM::SP;
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1545,7 +1545,8 @@
> if (NextVA.isMemLoc()) {
> unsigned ArgSize = NextVA.getLocVT().getSizeInBits()/8;
> MachineFrameInfo *MFI = MF.getFrameInfo();
> - int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset
> ());
> + int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset
> (),
> + true, false);
>
> // Create load node to retrieve arguments from the stack.
> SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
> @@ -1659,7 +1660,8 @@
> assert(VA.getValVT() != MVT::i64 && "i64 should already be
> lowered");
>
> unsigned ArgSize = VA.getLocVT().getSizeInBits()/8;
> - int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset());
> + int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(),
> + true, false);
>
> // Create load nodes to retrieve arguments from the stack.
> SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
> @@ -1687,7 +1689,8 @@
> // the result of va_next.
> AFI->setVarArgsRegSaveSize(VARegSaveSize);
> VarArgsFrameIndex = MFI->CreateFixedObject(VARegSaveSize,
> ArgOffset +
> - VARegSaveSize -
> VARegSize);
> + VARegSaveSize -
> VARegSize,
> + true, false);
> SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy
> ());
>
> SmallVector<SDValue, 4> MemOps;
> @@ -1711,7 +1714,7 @@
> &MemOps[0], MemOps.size());
> } else
> // This will point to the next argument passed via stack.
> - VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset);
> + VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset,
> true, false);
> }
>
> return Chain;
>
> Modified: llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -426,7 +426,7 @@
> }
> } else { //more args
> // Create the frame index object for this incoming parameter...
> - int FI = MFI->CreateFixedObject(8, 8 * (ArgNo - 6));
> + int FI = MFI->CreateFixedObject(8, 8 * (ArgNo - 6), true,
> false);
>
> // Create the SelectionDAG nodes corresponding to a load
> //from this parameter
> @@ -444,7 +444,7 @@
> if (TargetRegisterInfo::isPhysicalRegister(args_int[i]))
> args_int[i] = AddLiveIn(MF, args_int[i],
> &Alpha::GPRCRegClass);
> SDValue argt = DAG.getCopyFromReg(Chain, dl, args_int[i],
> MVT::i64);
> - int FI = MFI->CreateFixedObject(8, -8 * (6 - i));
> + int FI = MFI->CreateFixedObject(8, -8 * (6 - i), true, false);
> if (i == 0) VarArgsBase = FI;
> SDValue SDFI = DAG.getFrameIndex(FI, MVT::i64);
> LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0));
> @@ -452,7 +452,7 @@
> if (TargetRegisterInfo::isPhysicalRegister(args_float[i]))
> args_float[i] = AddLiveIn(MF, args_float[i],
> &Alpha::F8RCRegClass);
> argt = DAG.getCopyFromReg(Chain, dl, args_float[i], MVT::f64);
> - FI = MFI->CreateFixedObject(8, - 8 * (12 - i));
> + FI = MFI->CreateFixedObject(8, - 8 * (12 - i), true, false);
> SDFI = DAG.getFrameIndex(FI, MVT::i64);
> LS.push_back(DAG.getStore(Chain, dl, argt, SDFI, NULL, 0));
> }
>
> Modified: llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Blackfin/BlackfinISelLowering.cpp Thu Nov
> 12 14:49:22 2009
> @@ -207,7 +207,8 @@
> } else {
> assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc");
> unsigned ObjSize = VA.getLocVT().getStoreSize();
> - int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset());
> + int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset(),
> + true, false);
> SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
> InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN,
> NULL, 0));
> }
>
> Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.cpp Thu Nov
> 12 14:49:22 2009
> @@ -368,7 +368,8 @@
> if (requiresRegisterScavenging(MF)) {
> // Reserve a slot close to SP or frame pointer.
> RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
> - RC-
> >getAlignment()));
> + RC-
> >getAlignment(),
> + false));
> }
> }
>
> @@ -449,7 +450,8 @@
> return BF::RETS;
> }
>
> -unsigned BlackfinRegisterInfo::getFrameRegister(MachineFunction
> &MF) const {
> +unsigned
> +BlackfinRegisterInfo::getFrameRegister(const MachineFunction &MF)
> const {
> return hasFP(MF) ? BF::FP : BF::SP;
> }
>
>
> Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1090,7 +1090,7 @@
> // We need to load the argument to a virtual register if we
> determined
> // above that we ran out of physical registers of the
> appropriate type
> // or we're forced to do vararg
> - int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
> + int FI = MFI->CreateFixedObject(ObjSize, ArgOffset, true,
> false);
> SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
> ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0);
> ArgOffset += StackSlotSize;
> @@ -1110,7 +1110,8 @@
> // Create the frame slot
>
> for (; ArgRegIdx != NumArgRegs; ++ArgRegIdx) {
> - VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize,
> ArgOffset);
> + VarArgsFrameIndex = MFI->CreateFixedObject(StackSlotSize,
> ArgOffset,
> + true, false);
> SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
> SDValue ArgVal = DAG.getRegister(ArgRegs[ArgRegIdx],
> MVT::v16i8);
> SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, NULL, 0);
>
> Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -318,7 +318,7 @@
> << "\n";
> }
> // Create the frame index object for this incoming parameter...
> - int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset());
> + int FI = MFI->CreateFixedObject(ObjSize, VA.getLocMemOffset
> (), true, false);
>
> // Create the SelectionDAG nodes corresponding to a load
> //from this parameter
>
> Modified: llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/MSP430/MSP430RegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -212,7 +212,7 @@
> const
> {
> // Create a frame entry for the FPW register that must be saved.
> if (hasFP(MF)) {
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4,
> true, false);
> assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
> "Slot for FPW register must be last in order to be
> found!");
> FrameIdx = 0;
> @@ -355,7 +355,7 @@
> return MSP430::PCW;
> }
>
> -unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> +unsigned MSP430RegisterInfo::getFrameRegister(const MachineFunction
> &MF) const {
> return hasFP(MF) ? MSP430::FPW : MSP430::SPW;
> }
>
>
> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -704,7 +704,7 @@
> // the stack (even if less than 4 are used as arguments)
> if (Subtarget->isABI_O32()) {
> int VTsize = EVT(MVT::i32).getSizeInBits()/8;
> - MFI->CreateFixedObject(VTsize, (VTsize*3));
> + MFI->CreateFixedObject(VTsize, (VTsize*3), true, false);
> CCInfo.AnalyzeCallOperands(Outs, CC_MipsO32);
> } else
> CCInfo.AnalyzeCallOperands(Outs, CC_Mips);
> @@ -773,7 +773,7 @@
> // if O32 ABI is used. For EABI the first address is zero.
> LastArgStackLoc = (FirstStackArgLoc + VA.getLocMemOffset());
> int FI = MFI->CreateFixedObject(VA.getValVT().getSizeInBits()/8,
> - LastArgStackLoc);
> + LastArgStackLoc, true, false);
>
> SDValue PtrOff = DAG.getFrameIndex(FI,getPointerTy());
>
> @@ -849,7 +849,7 @@
> // Create the frame index only once. SPOffset here can be
> anything
> // (this will be fixed on processFunctionBeforeFrameFinalized)
> if (MipsFI->getGPStackOffset() == -1) {
> - FI = MFI->CreateFixedObject(4, 0);
> + FI = MFI->CreateFixedObject(4, 0, true, false);
> MipsFI->setGPFI(FI);
> }
> MipsFI->setGPStackOffset(LastArgStackLoc);
> @@ -1002,7 +1002,7 @@
> // be used on emitPrologue) to avoid mis-calc of the first
> stack
> // offset on PEI::calculateFrameObjectOffsets.
> // Arguments are always 32-bit.
> - int FI = MFI->CreateFixedObject(4, 0);
> + int FI = MFI->CreateFixedObject(4, 0, true, false);
> MipsFI->recordStoreVarArgsFI(FI, -(4+(i*4)));
> SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy());
>
> @@ -1025,7 +1025,7 @@
> // offset on PEI::calculateFrameObjectOffsets.
> // Arguments are always 32-bit.
> unsigned ArgSize = VA.getLocVT().getSizeInBits()/8;
> - int FI = MFI->CreateFixedObject(ArgSize, 0);
> + int FI = MFI->CreateFixedObject(ArgSize, 0, true, false);
> MipsFI->recordLoadArgsFI(FI, -(ArgSize+
> (FirstStackArgLoc + VA.getLocMemOffset())));
>
>
> Modified: llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/Mips/MipsRegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -287,7 +287,7 @@
> }
>
> if (hasFP(MF)) {
> - MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize),
> + MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize,
> true),
> StackOffset);
> MipsFI->setFPStackOffset(StackOffset);
> TopCPUSavedRegOff = StackOffset;
> @@ -295,7 +295,7 @@
> }
>
> if (MFI->hasCalls()) {
> - MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize),
> + MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize,
> true),
> StackOffset);
> MipsFI->setRAStackOffset(StackOffset);
> TopCPUSavedRegOff = StackOffset;
> @@ -501,7 +501,7 @@
> }
>
> unsigned MipsRegisterInfo::
> -getFrameRegister(MachineFunction &MF) const {
> +getFrameRegister(const MachineFunction &MF) const {
> return hasFP(MF) ? Mips::FP : Mips::SP;
> }
>
>
> Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1070,7 +1070,7 @@
>
> // Put the value on stack.
> // Get a stack slot index and convert to es.
> - int FI = MF.getFrameInfo()->CreateStackObject(1, 1);
> + int FI = MF.getFrameInfo()->CreateStackObject(1, 1, false);
> const char *tmpName = createESName(PAN::getTempdataLabel(FuncName));
> SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
>
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1625,7 +1625,7 @@
>
> unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8;
> int FI = MFI->CreateFixedObject(ArgSize, VA.getLocMemOffset(),
> - isImmutable);
> + isImmutable, false);
>
> // Create load nodes to retrieve arguments from the stack.
> SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
> @@ -1690,9 +1690,10 @@
> NumFPArgRegs * EVT(MVT::f64).getSizeInBits()/8;
>
> VarArgsStackOffset = MFI->CreateFixedObject(PtrVT.getSizeInBits
> ()/8,
> -
> CCInfo.getNextStackOffset());
> +
> CCInfo.getNextStackOffset(),
> + true, false);
>
> - VarArgsFrameIndex = MFI->CreateStackObject(Depth, 8);
> + VarArgsFrameIndex = MFI->CreateStackObject(Depth, 8, false);
> SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
>
> // The fixed integer arguments of a variadic function are
> @@ -1895,7 +1896,7 @@
> CurArgOffset = CurArgOffset + (4 - ObjSize);
> }
> // The value of the object is its address.
> - int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset);
> + int FI = MFI->CreateFixedObject(ObjSize, CurArgOffset, true,
> false);
> SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
> InVals.push_back(FIN);
> if (ObjSize==1 || ObjSize==2) {
> @@ -1918,7 +1919,7 @@
> // the object.
> if (GPR_idx != Num_GPR_Regs) {
> unsigned VReg = MF.addLiveIn(GPR[GPR_idx],
> &PPC::GPRCRegClass);
> - int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset);
> + int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset,
> true, false);
> SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
> SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
> SDValue Store = DAG.getStore(Val.getValue(1), dl, Val,
> FIN, NULL, 0);
> @@ -2043,7 +2044,7 @@
> if (needsLoad) {
> int FI = MFI->CreateFixedObject(ObjSize,
> CurArgOffset + (ArgSize -
> ObjSize),
> - isImmutable);
> + isImmutable, false);
> SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
> ArgVal = DAG.getLoad(ObjectVT, dl, Chain, FIN, NULL, 0);
> }
> @@ -2076,7 +2077,7 @@
> int Depth = ArgOffset;
>
> VarArgsFrameIndex = MFI->CreateFixedObject(PtrVT.getSizeInBits()/
> 8,
> - Depth);
> + Depth, true, false);
> SDValue FIN = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
>
> // If this function is vararg, store any remaining integer
> argument regs
> @@ -2289,7 +2290,8 @@
> int NewRetAddrLoc = SPDiff + PPCFrameInfo::getReturnSaveOffset
> (isPPC64,
>
> isDarwinABI);
> int NewRetAddr = MF.getFrameInfo()->CreateFixedObject(SlotSize,
> -
> NewRetAddrLoc);
> +
> NewRetAddrLoc,
> + true,
> false);
> EVT VT = isPPC64 ? MVT::i64 : MVT::i32;
> SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT);
> Chain = DAG.getStore(Chain, dl, OldRetAddr, NewRetAddrFrIdx,
> @@ -2300,7 +2302,8 @@
> if (isDarwinABI) {
> int NewFPLoc =
> SPDiff + PPCFrameInfo::getFramePointerSaveOffset(isPPC64,
> isDarwinABI);
> - int NewFPIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize,
> NewFPLoc);
> + int NewFPIdx = MF.getFrameInfo()->CreateFixedObject(SlotSize,
> NewFPLoc,
> + true,
> false);
> SDValue NewFramePtrIdx = DAG.getFrameIndex(NewFPIdx, VT);
> Chain = DAG.getStore(Chain, dl, OldFP, NewFramePtrIdx,
> PseudoSourceValue::getFixedStack
> (NewFPIdx), 0);
> @@ -2317,7 +2320,7 @@
> SmallVector<TailCallArgumentInfo, 8>&
> TailCallArguments) {
> int Offset = ArgOffset + SPDiff;
> uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8;
> - int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset);
> + int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset,
> true,false);
> EVT VT = isPPC64 ? MVT::i64 : MVT::i32;
> SDValue FIN = DAG.getFrameIndex(FI, VT);
> TailCallArgumentInfo Info;
> @@ -3224,7 +3227,8 @@
> // Find out what the fix offset of the frame pointer save area.
> int LROffset = PPCFrameInfo::getReturnSaveOffset(IsPPC64,
> isDarwinABI);
> // Allocate the frame index for frame pointer save area.
> - RASI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> LROffset);
> + RASI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> LROffset,
> + true, false);
> // Save the result.
> FI->setReturnAddrSaveIndex(RASI);
> }
> @@ -3250,7 +3254,8 @@
>
> isDarwinABI);
>
> // Allocate the frame index for frame pointer save area.
> - FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> FPOffset);
> + FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> FPOffset,
> + true, false);
> // Save the result.
> FI->setFramePointerSaveIndex(FPSI);
> }
> @@ -3411,7 +3416,7 @@
> // then lfd it and fcfid it.
> MachineFunction &MF = DAG.getMachineFunction();
> MachineFrameInfo *FrameInfo = MF.getFrameInfo();
> - int FrameIdx = FrameInfo->CreateStackObject(8, 8);
> + int FrameIdx = FrameInfo->CreateStackObject(8, 8, false);
> EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
> SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
>
> @@ -3469,7 +3474,7 @@
> SDValue Chain = DAG.getNode(PPCISD::MFFS, dl, NodeTys, &InFlag, 0);
>
> // Save FP register to stack slot
> - int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT);
> SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Chain,
> StackSlot, NULL, 0);
> @@ -4137,7 +4142,7 @@
> DebugLoc dl = Op.getDebugLoc();
> // Create a stack slot that is 16-byte aligned.
> MachineFrameInfo *FrameInfo = DAG.getMachineFunction().getFrameInfo
> ();
> - int FrameIdx = FrameInfo->CreateStackObject(16, 16);
> + int FrameIdx = FrameInfo->CreateStackObject(16, 16, false);
> EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
> SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
>
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1043,7 +1043,8 @@
> int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(IsPPC64,
>
> isDarwinABI);
> // Allocate the frame index for frame pointer save area.
> - FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> FPOffset);
> + FPSI = MF.getFrameInfo()->CreateFixedObject(IsPPC64? 8 : 4,
> FPOffset,
> + true, false);
> // Save the result.
> FI->setFramePointerSaveIndex(FPSI);
> }
> @@ -1051,7 +1052,8 @@
> // Reserve stack space to move the linkage area to in case of a
> tail call.
> int TCSPDelta = 0;
> if (PerformTailCallOpt && (TCSPDelta = FI->getTailCallSPDelta()) <
> 0) {
> - MF.getFrameInfo()->CreateFixedObject(-1 * TCSPDelta, TCSPDelta);
> + MF.getFrameInfo()->CreateFixedObject(-1 * TCSPDelta, TCSPDelta,
> + true, false);
> }
>
> // Reserve a slot closest to SP or frame pointer if we have a
> dynalloc or
> @@ -1067,7 +1069,8 @@
> const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;
> const TargetRegisterClass *RC = IsPPC64 ? G8RC : GPRC;
> RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize
> (),
> - RC-
> >getAlignment()));
> + RC-
> >getAlignment(),
> + false));
> }
> }
>
> @@ -1711,7 +1714,7 @@
> return !Subtarget.isPPC64() ? PPC::LR : PPC::LR8;
> }
>
> -unsigned PPCRegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> +unsigned PPCRegisterInfo::getFrameRegister(const MachineFunction
> &MF) const {
> if (!Subtarget.isPPC64())
> return hasFP(MF) ? PPC::R31 : PPC::R1;
> else
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -129,7 +129,8 @@
> }
> InVals.push_back(Arg);
> } else {
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset,
> + true,
> false);
> SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
> SDValue Load;
> if (ObjectVT == MVT::i32) {
> @@ -163,7 +164,8 @@
> Arg = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::f32, Arg);
> InVals.push_back(Arg);
> } else {
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset,
> + true,
> false);
> SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
> SDValue Load = DAG.getLoad(MVT::f32, dl, Chain, FIPtr, NULL,
> 0);
> InVals.push_back(Load);
> @@ -184,7 +186,8 @@
> MF.getRegInfo().addLiveIn(*CurArgReg++, VRegHi);
> HiVal = DAG.getCopyFromReg(Chain, dl, VRegHi, MVT::i32);
> } else {
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset,
> + true,
> false);
> SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
> HiVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0);
> }
> @@ -195,7 +198,8 @@
> MF.getRegInfo().addLiveIn(*CurArgReg++, VRegLo);
> LoVal = DAG.getCopyFromReg(Chain, dl, VRegLo, MVT::i32);
> } else {
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset+4);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset+4,
> + true,
> false);
> SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
> LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, NULL, 0);
> }
> @@ -227,7 +231,8 @@
> MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
> SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg,
> MVT::i32);
>
> - int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset);
> + int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4,
> ArgOffset,
> + true,
> false);
> SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
>
> OutChains.push_back(DAG.getStore(DAG.getRoot(), dl, Arg,
> FIPtr, NULL, 0));
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -329,7 +329,7 @@
> // Create the nodes corresponding to a load from this
> parameter slot.
> // Create the frame index object for this incoming parameter...
> int FI = MFI->CreateFixedObject(LocVT.getSizeInBits()/8,
> - VA.getLocMemOffset());
> + VA.getLocMemOffset(), true,
> false);
>
> // Create the SelectionDAG nodes corresponding to a load
> // from this parameter
>
> Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Thu Nov 12 14:49:22 2009
> @@ -1493,7 +1493,7 @@
> EVT ResVT = RVLocs[0].getValVT();
> unsigned Opc = ResVT == MVT::f32 ? X86::ST_Fp80m32 :
> X86::ST_Fp80m64;
> unsigned MemSize = ResVT.getSizeInBits()/8;
> - int FI = MFI.CreateStackObject(MemSize, MemSize);
> + int FI = MFI.CreateStackObject(MemSize, MemSize, false);
> addFrameReference(BuildMI(MBB, DL, TII.get(Opc)), FI).addReg
> (ResultReg);
> DstRC = ResVT == MVT::f32
> ? X86::FR32RegisterClass : X86::FR64RegisterClass;
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -1381,7 +1381,7 @@
> // In case of tail call optimization mark all arguments mutable.
> Since they
> // could be overwritten by lowering of arguments in case of a tail
> call.
> int FI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8,
> - VA.getLocMemOffset(), isImmutable);
> + VA.getLocMemOffset(),
> isImmutable, false);
> SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
> if (Flags.isByVal())
> return FIN;
> @@ -1510,7 +1510,7 @@
> // the start of the first vararg value... for expansion of
> llvm.va_start.
> if (isVarArg) {
> if (Is64Bit || CallConv != CallingConv::X86_FastCall) {
> - VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize);
> + VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize,
> true, false);
> }
> if (Is64Bit) {
> unsigned TotalNumIntRegs = 0, TotalNumXMMRegs = 0;
> @@ -1561,7 +1561,8 @@
> VarArgsGPOffset = NumIntRegs * 8;
> VarArgsFPOffset = TotalNumIntRegs * 8 + NumXMMRegs * 16;
> RegSaveFrameIndex = MFI->CreateStackObject(TotalNumIntRegs * 8 +
> - TotalNumXMMRegs *
> 16, 16);
> + TotalNumXMMRegs *
> 16, 16,
> + false);
>
> // Store the integer parameter registers.
> SmallVector<SDValue, 8> MemOps;
> @@ -1682,7 +1683,8 @@
> // Calculate the new stack slot for the return address.
> int SlotSize = Is64Bit ? 8 : 4;
> int NewReturnAddrFI =
> - MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize);
> + MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize,
> + true, false);
> EVT VT = Is64Bit ? MVT::i64 : MVT::i32;
> SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewReturnAddrFI, VT);
> Chain = DAG.getStore(Chain, dl, RetAddrFrIdx, NewRetAddrFrIdx,
> @@ -1895,7 +1897,7 @@
> // Create frame index.
> int32_t Offset = VA.getLocMemOffset()+FPDiff;
> uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8;
> - FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset);
> + FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset,
> true, false);
> FIN = DAG.getFrameIndex(FI, getPointerTy());
>
> if (Flags.isByVal()) {
> @@ -2180,7 +2182,8 @@
> if (ReturnAddrIndex == 0) {
> // Set up a frame object for the return address.
> uint64_t SlotSize = TD->getPointerSize();
> - ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject
> (SlotSize, -SlotSize);
> + ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject
> (SlotSize, -SlotSize,
> + true,
> false);
> FuncInfo->setRAIndex(ReturnAddrIndex);
> }
>
> @@ -4971,7 +4974,7 @@
> DebugLoc dl = Op.getDebugLoc();
> unsigned Size = SrcVT.getSizeInBits()/8;
> MachineFunction &MF = DAG.getMachineFunction();
> - int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size, false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
> SDValue Chain = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand
> (0),
> StackSlot,
> @@ -5005,7 +5008,7 @@
> // shouldn't be necessary except that RFP cannot be live across
> // multiple blocks. When stackifier is fixed, they can be
> uncoupled.
> MachineFunction &MF = DAG.getMachineFunction();
> - int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8, false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
> Tys = DAG.getVTList(MVT::Other);
> SmallVector<SDValue, 8> Ops;
> @@ -5215,7 +5218,7 @@
> // stack slot.
> MachineFunction &MF = DAG.getMachineFunction();
> unsigned MemSize = DstTy.getSizeInBits()/8;
> - int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize,
> false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
>
> unsigned Opc;
> @@ -5238,7 +5241,7 @@
> };
> Value = DAG.getNode(X86ISD::FLD, dl, Tys, Ops, 3);
> Chain = Value.getValue(1);
> - SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize);
> + SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize,
> false);
> StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
> }
>
> @@ -6762,7 +6765,7 @@
> DebugLoc dl = Op.getDebugLoc();
>
> // Save FP Control Word to stack slot
> - int SSFI = MF.getFrameInfo()->CreateStackObject(2, StackAlignment);
> + int SSFI = MF.getFrameInfo()->CreateStackObject(2,
> StackAlignment, false);
> SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
>
> SDValue Chain = DAG.getNode(X86ISD::FNSTCW16m, dl, MVT::Other,
> @@ -7987,7 +7990,7 @@
> // Change the floating point control register to use "round
> towards zero"
> // mode when truncating to an integer value.
> MachineFunction *F = BB->getParent();
> - int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2);
> + int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2,
> false);
> addFrameReference(BuildMI(BB, DL, TII->get(X86::FNSTCW16m)),
> CWFrameIdx);
>
> // Load the old value of the high byte of the control word...
>
> Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -614,8 +614,8 @@
> // Offset is a 32-bit integer.
> int Offset = getFrameIndexOffset(MF, FrameIndex) +
> (int)(MI.getOperand(i + 3).getImm());
> -
> - MI.getOperand(i + 3).ChangeToImmediate(Offset);
> +
> + MI.getOperand(i + 3).ChangeToImmediate(Offset);
> } else {
> // Offset is symbolic. This is extremely rare.
> uint64_t Offset = getFrameIndexOffset(MF, FrameIndex) +
> @@ -651,7 +651,8 @@
> // }
> // [EBP]
> MFI->CreateFixedObject(-TailCallReturnAddrDelta,
> - (-1U*SlotSize)+TailCallReturnAddrDelta);
> + (-1U*SlotSize)+TailCallReturnAddrDelta,
> + true, false);
> }
>
> if (hasFP(MF)) {
> @@ -663,7 +664,8 @@
> int FrameIdx = MFI->CreateFixedObject(SlotSize,
> -(int)SlotSize +
> TFI.getOffsetOfLocalArea() +
> - TailCallReturnAddrDelta);
> + TailCallReturnAddrDelta,
> + true, false);
> assert(FrameIdx == MFI->getObjectIndexBegin() &&
> "Slot for EBP register must be last in order to be
> found!");
> FrameIdx = 0;
> @@ -1275,7 +1277,7 @@
> : X86::EIP; // Should have dwarf #8.
> }
>
> -unsigned X86RegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> +unsigned X86RegisterInfo::getFrameRegister(const MachineFunction
> &MF) const {
> return hasFP(MF) ? FramePtr : StackPtr;
> }
>
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Thu Nov 12
> 14:49:22 2009
> @@ -860,7 +860,8 @@
> }
> // Create the frame index object for this incoming parameter...
> int FI = MFI->CreateFixedObject(ObjSize,
> - LRSaveSize +
> VA.getLocMemOffset());
> + LRSaveSize +
> VA.getLocMemOffset(),
> + true, false);
>
> // Create the SelectionDAG nodes corresponding to a load
> //from this parameter
> @@ -884,7 +885,7 @@
> // address
> for (unsigned i = array_lengthof(ArgRegs) - 1; i >=
> FirstVAReg; --i) {
> // Create a stack slot
> - int FI = MFI->CreateFixedObject(4, offset);
> + int FI = MFI->CreateFixedObject(4, offset, true, false);
> if (i == FirstVAReg) {
> XFI->setVarArgsFrameIndex(FI);
> }
> @@ -905,7 +906,8 @@
> } else {
> // This will point to the next argument passed via stack.
> XFI->setVarArgsFrameIndex(
> - MFI->CreateFixedObject(4, LRSaveSize +
> CCInfo.getNextStackOffset()));
> + MFI->CreateFixedObject(4, LRSaveSize +
> CCInfo.getNextStackOffset(),
> + true, false));
> }
> }
>
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp?rev=87022&r1=87021&r2=87022&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreRegisterInfo.cpp Thu Nov 12
> 14:49:22 2009
> @@ -330,9 +330,10 @@
> int FrameIdx;
> if (! isVarArg) {
> // A fixed offset of 0 allows us to save / restore LR using
> entsp / retsp.
> - FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0);
> + FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true,
> false);
> } else {
> - FrameIdx = MFI->CreateStackObject(RC->getSize(), RC-
> >getAlignment());
> + FrameIdx = MFI->CreateStackObject(RC->getSize(), RC-
> >getAlignment(),
> + false);
> }
> XFI->setUsesLR(FrameIdx);
> XFI->setLRSpillSlot(FrameIdx);
> @@ -340,13 +341,15 @@
> if (requiresRegisterScavenging(MF)) {
> // Reserve a slot close to SP or frame pointer.
> RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
> - RC->getAlignment()));
> + RC-
> >getAlignment(),
> + false));
> }
> if (hasFP(MF)) {
> // A callee save register is used to hold the FP.
> // This needs saving / restoring in the epilogue / prologue.
> XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),
> - RC->getAlignment()));
> + RC->getAlignment(),
> + false));
> }
> }
>
> @@ -593,7 +596,7 @@
> return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
> }
>
> -unsigned XCoreRegisterInfo::getFrameRegister(MachineFunction &MF)
> const {
> +unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction
> &MF) const {
> bool FP = hasFP(MF);
>
> return FP ? XCore::R10 : XCore::SP;
>
>
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