[llvm-commits] [llvm] r86056 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Jim Grosbach grosbach at apple.com
Wed Nov 4 14:41:00 PST 2009


Author: grosbach
Date: Wed Nov  4 16:41:00 2009
New Revision: 86056

URL: http://llvm.org/viewvc/llvm-project?rev=86056&view=rev
Log:
dynamic stack realignment necessitates scanning the floating point callee-
saved instructions even if no stack adjustment for those saves is needed.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=86056&r1=86055&r2=86056&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Nov  4 16:41:00 2009
@@ -1339,10 +1339,10 @@
   AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
   AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
 
+  movePastCSLoadStoreOps(MBB, MBBI, ARM::FSTD, 0, 3, STI);
   NumBytes = DPRCSOffset;
   if (NumBytes) {
-    // Insert it after all the callee-save spills.
-    movePastCSLoadStoreOps(MBB, MBBI, ARM::FSTD, 0, 3, STI);
+    // Adjust SP after all the callee-save spills.
     emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes);
   }
 





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