[llvm-commits] [llvm] r85787 - in /llvm/trunk: lib/Target/ARM/ARMBaseInstrInfo.cpp test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll

Evan Cheng evan.cheng at apple.com
Sun Nov 1 20:44:55 PST 2009


Author: evancheng
Date: Sun Nov  1 22:44:55 2009
New Revision: 85787

URL: http://llvm.org/viewvc/llvm-project?rev=85787&view=rev
Log:
Unbreak ARMBaseRegisterInfo::copyRegToReg.

Added:
    llvm/trunk/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=85787&r1=85786&r2=85787&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sun Nov  1 22:44:55 2009
@@ -660,26 +660,27 @@
   } else if (DestRC == ARM::DPRRegisterClass) {
     const ARMBaseRegisterInfo* TRI = &getRegisterInfo();
 
+    // If we do not found an instruction defining the reg, this means the
+    // register should be live-in for this BB. It's always to better to use
+    // NEON reg-reg moves.
+    unsigned Domain = ARMII::DomainNEON;
+    
     // Find the Machine Instruction which defines SrcReg.
-    MachineBasicBlock::iterator J = (I == MBB.begin() ? I : prior(I));
-    while (J != MBB.begin()) {
-      if (J->modifiesRegister(SrcReg, TRI))
-        break;
-      --J;
-    }
+    if (!MBB.empty()) {
+      MachineBasicBlock::iterator J = (I == MBB.begin() ? I : prior(I));
+      while (J != MBB.begin()) {
+        if (J->modifiesRegister(SrcReg, TRI))
+          break;
+        --J;
+      }
 
-    unsigned Domain;
-    if (J->modifiesRegister(SrcReg, TRI)) {
-      Domain = J->getDesc().TSFlags & ARMII::DomainMask;
-      // Instructions in general domain are subreg accesses.
-      // Map them to NEON reg-reg moves.
-      if (Domain == ARMII::DomainGeneral)
-        Domain = ARMII::DomainNEON;
-    } else {
-      // We reached the beginning of the BB and found no instruction defining
-      // the reg. This means that register should be live-in for this BB.
-      // It's always to better to use NEON reg-reg moves.
-      Domain = ARMII::DomainNEON;
+      if (J->modifiesRegister(SrcReg, TRI)) {
+        Domain = J->getDesc().TSFlags & ARMII::DomainMask;
+        // Instructions in general domain are subreg accesses.
+        // Map them to NEON reg-reg moves.
+        if (Domain == ARMII::DomainGeneral)
+          Domain = ARMII::DomainNEON;
+      }
     }
 
     if ((Domain & ARMII::DomainNEON) && getSubtarget().hasNEON()) {

Added: llvm/trunk/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll?rev=85787&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb2/2009-11-01-CopyReg2RegBug.ll Sun Nov  1 22:44:55 2009
@@ -0,0 +1,29 @@
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8
+
+define arm_apcscc void @get_initial_mb16x16_cost() nounwind {
+entry:
+  br i1 undef, label %bb4, label %bb1
+
+bb1:                                              ; preds = %entry
+  br label %bb7
+
+bb4:                                              ; preds = %entry
+  br i1 undef, label %bb7.thread, label %bb5
+
+bb5:                                              ; preds = %bb4
+  br label %bb7
+
+bb7.thread:                                       ; preds = %bb4
+  br label %bb8
+
+bb7:                                              ; preds = %bb5, %bb1
+  br i1 undef, label %bb8, label %bb10
+
+bb8:                                              ; preds = %bb7, %bb7.thread
+  %0 = phi double [ 5.120000e+02, %bb7.thread ], [ undef, %bb7 ] ; <double> [#uses=1]
+  %1 = fdiv double %0, undef                      ; <double> [#uses=0]
+  unreachable
+
+bb10:                                             ; preds = %bb7
+  ret void
+}





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