[llvm-commits] [llvm] r84983 - /llvm/trunk/lib/CodeGen/LowerSubregs.cpp

[Anton Korobeynikov]

Author: asl
Date: Fri Oct 23 19:27:00 2009
New Revision: 84983

URL: http://llvm.org/viewvc/llvm-project?rev=84983&view=rev
Log:
Add some asserts to catch copyRegToReg() fails early

Modified:
    llvm/trunk/lib/CodeGen/LowerSubregs.cpp

Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=84983&r1=84982&r2=84983&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original)
+++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Fri Oct 23 19:27:00 2009
@@ -195,7 +195,9 @@
     // Insert sub-register copy
     const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
     const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
-    TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+    bool Emitted = TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+    (void)Emitted;
+    assert(Emitted && "Subreg and Dst must be of compatible register class");
     // Transfer the kill/dead flags, if needed.
     if (MI->getOperand(0).isDead())
       TransferDeadFlag(MI, DstSubReg, TRI);
@@ -209,7 +211,7 @@
 
   DEBUG(errs() << '\n');
   MBB->erase(MI);
-  return true;                    
+  return true;
 }
 
 bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
@@ -264,8 +266,11 @@
       // KILL.
       BuildMI(*MBB, MI, MI->getDebugLoc(),
               TII.get(TargetInstrInfo::KILL), DstSubReg);
-    else
-      TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+    else {
+      bool Emitted = TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+      (void)Emitted;
+      assert(Emitted && "Subreg and Dst must be of compatible register class");
+    }
     MachineBasicBlock::iterator CopyMI = MI;
     --CopyMI;