[llvm-commits] [llvm] r83475 - in /llvm/trunk: include/llvm/CodeGen/MachineInstr.h include/llvm/Target/TargetInstrInfo.h lib/CodeGen/MachineInstr.cpp lib/CodeGen/MachineLICM.cpp lib/CodeGen/MachineSink.cpp lib/CodeGen/ScheduleDAGInstrs.cpp lib/Ta

Devang Patel devang.patel at gmail.com
Wed Oct 7 10:47:58 PDT 2009


On Wed, Oct 7, 2009 at 10:38 AM, Dan Gohman <gohman at apple.com> wrote:
> Author: djg
> Date: Wed Oct  7 12:38:06 2009
> New Revision: 83475
>
> URL: http://llvm.org/viewvc/llvm-project?rev=83475&view=rev
> Log:
> Replace TargetInstrInfo::isInvariantLoad and its target-specific
> implementations with a new MachineInstr::isInvariantLoad, which uses
> MachineMemOperands and is target-independent. This brings MachineLICM
> and other functionality to targets which previously lacked an
> isInvariantLoad implementation.
>
> Modified:
>    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
>    llvm/trunk/include/llvm/Target/TargetInstrInfo.h
>    llvm/trunk/lib/CodeGen/MachineInstr.cpp
>    llvm/trunk/lib/CodeGen/MachineLICM.cpp
>    llvm/trunk/lib/CodeGen/MachineSink.cpp
>    llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
>    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
>    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
>    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
>    llvm/trunk/lib/Target/X86/X86InstrInfo.h
>    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
>    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Wed Oct  7 12:38:06 2009
> @@ -26,6 +26,7 @@
>
>  namespace llvm {
>
> +class AliasAnalysis;
>  class TargetInstrDesc;
>  class TargetInstrInfo;
>  class TargetRegisterInfo;
> @@ -286,6 +287,13 @@
>   /// have no volatile memory references.
>   bool hasVolatileMemoryRef() const;
>
> +  /// isInvariantLoad - Return true if this instruction is loading from a
> +  /// location whose value is invariant across the function.  For example,
> +  /// loading a value from the constant pool or from from the argument area of
> +  /// a function if it does not change.  This should only return true of *all*
> +  /// loads the instruction does are invariant (if it does multiple loads).
> +  bool isInvariantLoad(AliasAnalysis *AA = 0) const;
> +
>   //
>   // Debugging support
>   //
>
> Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Wed Oct  7 12:38:06 2009
> @@ -157,16 +157,6 @@
>                              unsigned DestReg, unsigned SubIdx,
>                              const MachineInstr *Orig) const = 0;
>
> -  /// isInvariantLoad - Return true if the specified instruction (which is
> -  /// marked mayLoad) is loading from a location whose value is invariant across
> -  /// the function.  For example, loading a value from the constant pool or from
> -  /// from the argument area of a function if it does not change.  This should
> -  /// only return true of *all* loads the instruction does are invariant (if it
> -  /// does multiple loads).
> -  virtual bool isInvariantLoad(const MachineInstr *MI) const {
> -    return false;
> -  }
> -
>   /// convertToThreeAddress - This method must be implemented by targets that
>   /// set the M_CONVERTIBLE_TO_3_ADDR flag.  When this flag is set, the target
>   /// may be able to convert a two-address instruction into one or more true
>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Wed Oct  7 12:38:06 2009
> @@ -24,6 +24,7 @@
>  #include "llvm/Target/TargetInstrInfo.h"
>  #include "llvm/Target/TargetInstrDesc.h"
>  #include "llvm/Target/TargetRegisterInfo.h"
> +#include "llvm/Analysis/AliasAnalysis.h"
>  #include "llvm/Analysis/DebugInfo.h"
>  #include "llvm/Support/ErrorHandling.h"
>  #include "llvm/Support/LeakDetector.h"
> @@ -946,7 +947,7 @@
>   // destination. The check for isInvariantLoad gives the targe the chance to
>   // classify the load as always returning a constant, e.g. a constant pool
>   // load.
> -  if (TID->mayLoad() && !TII->isInvariantLoad(this))
> +  if (TID->mayLoad() && !isInvariantLoad())

Now, isInvariantLoad() checks mayLoad() so this (and other instances)
can be simplified.

>     // Otherwise, this is a real load.  If there is a store between the load and
>     // end of block, or if the load is volatile, we can't move it.
>     return !SawStore && !hasVolatileMemoryRef();
> @@ -1005,6 +1006,46 @@
>   return false;
>  }
>
> +/// isInvariantLoad - Return true if this instruction is loading from a
> +/// location whose value is invariant across the function.  For example,
> +/// loading a value from the constant pool or from from the argument area
> +/// of a function if it does not change.  This should only return true of
> +/// *all* loads the instruction does are invariant (if it does multiple loads).

This routine returns false if the instruction does do any load. If
intentional then I'd explicitly put it in comments here.

-
Devang

> +bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const {
> +  // If the instruction doesn't load at all, it isn't an invariant load.
> +  if (!TID->mayLoad())
> +    return false;
> +
> +  // If the instruction has lost its memoperands, conservatively assume that
> +  // it may not be an invariant load.
> +  if (memoperands_empty())
> +    return false;
> +  const MachineFrameInfo *MFI = getParent()->getParent()->getFrameInfo();
> +
> +  for (mmo_iterator I = memoperands_begin(),
> +       E = memoperands_end(); I != E; ++I) {
> +    if ((*I)->isVolatile()) return false;
> +    if ((*I)->isStore()) return false;
> +
> +    if (const Value *V = (*I)->getValue()) {
> +      // A load from a constant PseudoSourceValue is invariant.
> +      if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V))
> +        if (PSV->isConstant(MFI))
> +          continue;
> +      // If we have an AliasAnalysis, ask it whether the memory is constant.
> +      if (AA && AA->pointsToConstantMemory(V))
> +        continue;
> +    }
> +
> +    // Otherwise assume conservatively.
> +    return false;
> +  }
> +
> +  // Everything checks out.
> +  return true;
> +}
> +
>  void MachineInstr::dump() const {
>   errs() << "  " << *this;
>  }
>
> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Oct  7 12:38:06 2009
> @@ -28,6 +28,7 @@
>  #include "llvm/Target/TargetRegisterInfo.h"
>  #include "llvm/Target/TargetInstrInfo.h"
>  #include "llvm/Target/TargetMachine.h"
> +#include "llvm/Analysis/AliasAnalysis.h"
>  #include "llvm/ADT/DenseMap.h"
>  #include "llvm/ADT/Statistic.h"
>  #include "llvm/Support/Compiler.h"
> @@ -47,6 +48,7 @@
>     BitVector AllocatableSet;
>
>     // Various analyses that we use...
> +    AliasAnalysis        *AA;      // Alias analysis info.
>     MachineLoopInfo      *LI;      // Current MachineLoopInfo
>     MachineDominatorTree *DT;      // Machine dominator tree for the cur loop
>     MachineRegisterInfo  *RegInfo; // Machine register information
> @@ -72,6 +74,7 @@
>       AU.setPreservesCFG();
>       AU.addRequired<MachineLoopInfo>();
>       AU.addRequired<MachineDominatorTree>();
> +      AU.addRequired<AliasAnalysis>();
>       AU.addPreserved<MachineLoopInfo>();
>       AU.addPreserved<MachineDominatorTree>();
>       MachineFunctionPass::getAnalysisUsage(AU);
> @@ -144,6 +147,7 @@
>   // Get our Loop information...
>   LI = &getAnalysis<MachineLoopInfo>();
>   DT = &getAnalysis<MachineDominatorTree>();
> +  AA = &getAnalysis<AliasAnalysis>();
>
>   for (MachineLoopInfo::iterator
>          I = LI->begin(), E = LI->end(); I != E; ++I) {
> @@ -214,7 +218,7 @@
>     // Okay, this instruction does a load. As a refinement, we allow the target
>     // to decide whether the loaded value is actually a constant. If so, we can
>     // actually use it as a load.
> -    if (!TII->isInvariantLoad(&I))
> +    if (!I.isInvariantLoad(AA))
>       // FIXME: we should be able to sink loads with no other side effects if
>       // there is nothing that can change memory from here until the end of
>       // block. This is a trivial form of alias analysis.
> @@ -259,8 +263,6 @@
>
>     // Don't hoist an instruction that uses or defines a physical register.
>     if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
> -      // If this is a physical register use, we can't move it.  If it is a def,
> -      // we can move it, but only if the def is dead.
>       if (MO.isUse()) {
>         // If the physreg has no defs anywhere, it's just an ambient register
>         // and we can freely move its uses. Alternatively, if it's allocatable,
>
> Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineSink.cpp Wed Oct  7 12:38:06 2009
> @@ -178,8 +178,6 @@
>     if (Reg == 0) continue;
>
>     if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
> -      // If this is a physical register use, we can't move it.  If it is a def,
> -      // we can move it, but only if the def is dead.
>       if (MO.isUse()) {
>         // If the physreg has no defs anywhere, it's just an ambient register
>         // and we can freely move its uses. Alternatively, if it's allocatable,
>
> Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)
> +++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Wed Oct  7 12:38:06 2009
> @@ -375,7 +375,7 @@
>         // Treat all other stores conservatively.
>         goto new_chain;
>     } else if (TID.mayLoad()) {
> -      if (TII->isInvariantLoad(MI)) {
> +      if (MI->isInvariantLoad()) {
>         // Invariant load, no chain dependencies needed!
>       } else if (const Value *V = getUnderlyingObjectForInstr(MI)) {
>         // A load from a specific PseudoSourceValue. Add precise dependencies.
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp Wed Oct  7 12:38:06 2009
> @@ -266,30 +266,6 @@
>   return 0;
>  }
>
> -bool SystemZInstrInfo::isInvariantLoad(const MachineInstr *MI) const {
> -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> -    const MachineOperand &MO = MI->getOperand(i);
> -    // Loads from constant pools are trivially invariant.
> -    if (MO.isCPI())
> -      return true;
> -
> -    if (MO.isGlobal())
> -      return isGVStub(MO.getGlobal(), TM);
> -
> -    // If this is a load from an invariant stack slot, the load is a constant.
> -    if (MO.isFI()) {
> -      const MachineFrameInfo &MFI =
> -        *MI->getParent()->getParent()->getFrameInfo();
> -      int Idx = MO.getIndex();
> -      return MFI.isFixedObjectIndex(Idx) && MFI.isImmutableObjectIndex(Idx);
> -    }
> -  }
> -
> -  // All other instances of these instructions are presumed to have other
> -  // issues.
> -  return false;
> -}
> -
>  bool
>  SystemZInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
>                                            MachineBasicBlock::iterator MI,
>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h (original)
> +++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h Wed Oct  7 12:38:06 2009
> @@ -70,7 +70,6 @@
>                    unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
>   unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
>   unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
> -  bool isInvariantLoad(const MachineInstr *MI) const;
>
>   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
>                                    MachineBasicBlock::iterator MI,
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Oct  7 12:38:06 2009
> @@ -958,43 +958,6 @@
>   NewMI->getOperand(0).setSubReg(SubIdx);
>  }
>
> -/// isInvariantLoad - Return true if the specified instruction (which is marked
> -/// mayLoad) is loading from a location whose value is invariant across the
> -/// function.  For example, loading a value from the constant pool or from
> -/// from the argument area of a function if it does not change.  This should
> -/// only return true of *all* loads the instruction does are invariant (if it
> -/// does multiple loads).
> -bool X86InstrInfo::isInvariantLoad(const MachineInstr *MI) const {
> -  // This code cares about loads from three cases: constant pool entries,
> -  // invariant argument slots, and global stubs.  In order to handle these cases
> -  // for all of the myriad of X86 instructions, we just scan for a CP/FI/GV
> -  // operand and base our analysis on it.  This is safe because the address of
> -  // none of these three cases is ever used as anything other than a load base
> -  // and X86 doesn't have any instructions that load from multiple places.
> -
> -  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> -    const MachineOperand &MO = MI->getOperand(i);
> -    // Loads from constant pools are trivially invariant.
> -    if (MO.isCPI())
> -      return true;
> -
> -    if (MO.isGlobal())
> -      return isGlobalStubReference(MO.getTargetFlags());
> -
> -    // If this is a load from an invariant stack slot, the load is a constant.
> -    if (MO.isFI()) {
> -      const MachineFrameInfo &MFI =
> -        *MI->getParent()->getParent()->getFrameInfo();
> -      int Idx = MO.getIndex();
> -      return MFI.isFixedObjectIndex(Idx) && MFI.isImmutableObjectIndex(Idx);
> -    }
> -  }
> -
> -  // All other instances of these instructions are presumed to have other
> -  // issues.
> -  return false;
> -}
> -
>  /// hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that
>  /// is not marked dead.
>  static bool hasLiveCondCodeDef(MachineInstr *MI) {
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Wed Oct  7 12:38:06 2009
> @@ -456,8 +456,6 @@
>                      unsigned DestReg, unsigned SubIdx,
>                      const MachineInstr *Orig) const;
>
> -  bool isInvariantLoad(const MachineInstr *MI) const;
> -
>   /// convertToThreeAddress - This method must be implemented by targets that
>   /// set the M_CONVERTIBLE_TO_3_ADDR flag.  When this flag is set, the target
>   /// may be able to convert a two-address instruction into a true
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp Wed Oct  7 12:38:06 2009
> @@ -116,30 +116,6 @@
>   return 0;
>  }
>
> -/// isInvariantLoad - Return true if the specified instruction (which is marked
> -/// mayLoad) is loading from a location whose value is invariant across the
> -/// function.  For example, loading a value from the constant pool or from
> -/// from the argument area of a function if it does not change.  This should
> -/// only return true of *all* loads the instruction does are invariant (if it
> -/// does multiple loads).
> -bool
> -XCoreInstrInfo::isInvariantLoad(const MachineInstr *MI) const {
> -  // Loads from constants pools and loads from invariant argument slots are
> -  // invariant
> -  int Opcode = MI->getOpcode();
> -  if (Opcode == XCore::LDWCP_ru6 || Opcode == XCore::LDWCP_lru6) {
> -    return MI->getOperand(1).isCPI();
> -  }
> -  int FrameIndex;
> -  if (isLoadFromStackSlot(MI, FrameIndex)) {
> -    const MachineFrameInfo &MFI =
> -      *MI->getParent()->getParent()->getFrameInfo();
> -    return MFI.isFixedObjectIndex(FrameIndex) &&
> -           MFI.isImmutableObjectIndex(FrameIndex);
> -  }
> -  return false;
> -}
> -
>  //===----------------------------------------------------------------------===//
>  // Branch Analysis
>  //===----------------------------------------------------------------------===//
>
> Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h?rev=83475&r1=83474&r2=83475&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h (original)
> +++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.h Wed Oct  7 12:38:06 2009
> @@ -52,8 +52,6 @@
>   virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
>                                       int &FrameIndex) const;
>
> -  virtual bool isInvariantLoad(const MachineInstr *MI) const;
> -
>   virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
>                              MachineBasicBlock *&FBB,
>                              SmallVectorImpl<MachineOperand> &Cond,
>
>
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-- 
-
Devang




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