[llvm-commits] [llvm] r83435 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.cpp ARMISelLowering.cpp

Evan Cheng evan.cheng at apple.com
Tue Oct 6 17:34:42 PDT 2009


This patch is not ELF specific, right?

Evan

On Oct 6, 2009, at 5:06 PM, Anton Korobeynikov wrote:

> Author: asl
> Date: Tue Oct  6 19:06:35 2009
> New Revision: 83435
>
> URL: http://llvm.org/viewvc/llvm-project?rev=83435&view=rev
> Log:
> Add PseudoSourceValues for constpool stuff on ELF (Darwin should use  
> something similar)
> and register spills.
>
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=83435&r1=83434&r2=83435&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Tue Oct  6  
> 19:06:35 2009
> @@ -21,6 +21,8 @@
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineInstrBuilder.h"
> #include "llvm/CodeGen/MachineJumpTableInfo.h"
> +#include "llvm/CodeGen/MachineMemOperand.h"
> +#include "llvm/CodeGen/PseudoSourceValue.h"
> #include "llvm/MC/MCAsmInfo.h"
> #include "llvm/Support/CommandLine.h"
> #include "llvm/Support/ErrorHandling.h"
> @@ -665,27 +667,35 @@
>                     const TargetRegisterClass *RC) const {
>   DebugLoc DL = DebugLoc::getUnknownLoc();
>   if (I != MBB.end()) DL = I->getDebugLoc();
> +  MachineFunction &MF = *MBB.getParent();
> +  MachineFrameInfo &MFI = *MF.getFrameInfo();
> +
> +  MachineMemOperand *MMO =
> +    MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
> +                            MachineMemOperand::MOStore, 0,
> +                            MFI.getObjectSize(FI),
> +                            MFI.getObjectAlignment(FI));
>
>   if (RC == ARM::GPRRegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::STR))
>                    .addReg(SrcReg, getKillRegState(isKill))
> -                   .addFrameIndex(FI).addReg(0).addImm(0));
> + 
>                    .addFrameIndex 
> (FI).addReg(0).addImm(0).addMemOperand(MMO));
>   } else if (RC == ARM::DPRRegisterClass ||
>              RC == ARM::DPR_VFP2RegisterClass ||
>              RC == ARM::DPR_8RegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FSTD))
>                    .addReg(SrcReg, getKillRegState(isKill))
> -                   .addFrameIndex(FI).addImm(0));
> +                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
>   } else if (RC == ARM::SPRRegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FSTS))
>                    .addReg(SrcReg, getKillRegState(isKill))
> -                   .addFrameIndex(FI).addImm(0));
> +                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
>   } else {
>     assert((RC == ARM::QPRRegisterClass ||
>             RC == ARM::QPR_VFP2RegisterClass) && "Unknown regclass!");
>     // FIXME: Neon instructions should support predicates
>     BuildMI(MBB, I, DL, get(ARM::VSTRQ)).addReg(SrcReg,  
> getKillRegState(isKill))
> -      .addFrameIndex(FI).addImm(0);
> +      .addFrameIndex(FI).addImm(0).addMemOperand(MMO);
>   }
> }
>
> @@ -695,23 +705,31 @@
>                      const TargetRegisterClass *RC) const {
>   DebugLoc DL = DebugLoc::getUnknownLoc();
>   if (I != MBB.end()) DL = I->getDebugLoc();
> +  MachineFunction &MF = *MBB.getParent();
> +  MachineFrameInfo &MFI = *MF.getFrameInfo();
> +
> +  MachineMemOperand *MMO =
> +    MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
> +                            MachineMemOperand::MOLoad, 0,
> +                            MFI.getObjectSize(FI),
> +                            MFI.getObjectAlignment(FI));
>
>   if (RC == ARM::GPRRegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::LDR), DestReg)
> -                   .addFrameIndex(FI).addReg(0).addImm(0));
> + 
>                    .addFrameIndex 
> (FI).addReg(0).addImm(0).addMemOperand(MMO));
>   } else if (RC == ARM::DPRRegisterClass ||
>              RC == ARM::DPR_VFP2RegisterClass ||
>              RC == ARM::DPR_8RegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FLDD), DestReg)
> -                   .addFrameIndex(FI).addImm(0));
> +                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
>   } else if (RC == ARM::SPRRegisterClass) {
>     AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FLDS), DestReg)
> -                   .addFrameIndex(FI).addImm(0));
> +                   .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
>   } else {
>     assert((RC == ARM::QPRRegisterClass ||
>             RC == ARM::QPR_VFP2RegisterClass) && "Unknown regclass!");
>     // FIXME: Neon instructions should support predicates
> -    BuildMI(MBB, I, DL, get(ARM::VLDRQ),  
> DestReg).addFrameIndex(FI).addImm(0);
> +    BuildMI(MBB, I, DL, get(ARM::VLDRQ),  
> DestReg).addFrameIndex(FI).addImm(0).addMemOperand(MMO);
>   }
> }
>
>
> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=83435&r1=83434&r2=83435&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue Oct  6  
> 19:06:35 2009
> @@ -1303,17 +1303,20 @@
>     SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
>     CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
>     SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(),
> -                                 CPAddr, NULL, 0);
> +                                 CPAddr,
> +                                  
> PseudoSourceValue::getConstantPool(), 0);
>     SDValue Chain = Result.getValue(1);
>     SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(PtrVT);
>     Result = DAG.getNode(ISD::ADD, dl, PtrVT, Result, GOT);
>     if (!UseGOTOFF)
> -      Result = DAG.getLoad(PtrVT, dl, Chain, Result, NULL, 0);
> +      Result = DAG.getLoad(PtrVT, dl, Chain, Result,
> +                           PseudoSourceValue::getGOT(), 0);
>     return Result;
>   } else {
>     SDValue CPAddr = DAG.getTargetConstantPool(GV, PtrVT, 4);
>     CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
> -    return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL,  
> 0);
> +    return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr,
> +                       PseudoSourceValue::getConstantPool(), 0);
>   }
> }
>
> @@ -1360,7 +1363,8 @@
>                                                         
> ARMPCLabelIndex, PCAdj);
>   SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
>   CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
> -  SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(),  
> CPAddr, NULL, 0);
> +  SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr,
> +                                
> PseudoSourceValue::getConstantPool(), 0);
>   SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32);
>   return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
> }
>
>
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