[llvm-commits] [llvm] r83407 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Bob Wilson]

Author: bwilson
Date: Tue Oct  6 15:18:46 2009
New Revision: 83407

URL: http://llvm.org/viewvc/llvm-project?rev=83407&view=rev
Log:
Fix a comment typo.
Patch by Johnny Chen.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=83407&r1=83406&r2=83407&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Oct  6 15:18:46 2009
@@ -384,7 +384,7 @@
 }
 
 /// AI1_bin_s_irs - Similar to AsI1_bin_irs except it sets the 's' bit so the
-/// instruction modifies the CSPR register.
+/// instruction modifies the CPSR register.
 let Defs = [CPSR] in {
 multiclass AI1_bin_s_irs<bits<4> opcod, string opc, PatFrag opnode,
                          bit Commutable = 0> {