[llvm-commits] [llvm] r82909 - in /llvm/trunk: include/llvm/Target/TargetFrameInfo.h lib/CodeGen/PrologEpilogInserter.cpp lib/Target/PowerPC/PPCFrameInfo.h
Tilmann Scheller
tilmann.scheller at googlemail.com
Sun Sep 27 10:58:47 PDT 2009
Author: tilmann
Date: Sun Sep 27 12:58:47 2009
New Revision: 82909
URL: http://llvm.org/viewvc/llvm-project?rev=82909&view=rev
Log:
Use explicit structs instead of std::pair to map callee saved regs to spill slots.
Modified:
llvm/trunk/include/llvm/Target/TargetFrameInfo.h
llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetFrameInfo.h?rev=82909&r1=82908&r2=82909&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetFrameInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetFrameInfo.h Sun Sep 27 12:58:47 2009
@@ -31,6 +31,12 @@
StackGrowsUp, // Adding to the stack increases the stack address
StackGrowsDown // Adding to the stack decreases the stack address
};
+
+ // Maps a callee saved register to a stack slot with a fixed offset.
+ struct SpillSlot {
+ unsigned Reg;
+ int Offset; // Offset relative to stack pointer on function entry.
+ };
private:
StackDirection StackDir;
unsigned StackAlignment;
@@ -76,10 +82,10 @@
///
/// Each entry in this array contains a <register,offset> pair, indicating the
/// fixed offset from the incoming stack pointer that each register should be
- /// spilled at. If a register is not listed here, the code generator is
+ /// spilled at. If a register is not listed here, the code generator is
/// allowed to spill it anywhere it chooses.
///
- virtual const std::pair<unsigned, int> *
+ virtual const SpillSlot *
getCalleeSavedSpillSlots(unsigned &NumEntries) const {
NumEntries = 0;
return 0;
Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=82909&r1=82908&r2=82909&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Sun Sep 27 12:58:47 2009
@@ -236,7 +236,7 @@
return; // Early exit if no callee saved registers are modified!
unsigned NumFixedSpillSlots;
- const std::pair<unsigned,int> *FixedSpillSlots =
+ const TargetFrameInfo::SpillSlot *FixedSpillSlots =
TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
// Now that we know which registers need to be saved and restored, allocate
@@ -254,9 +254,9 @@
// Check to see if this physreg must be spilled to a particular stack slot
// on this target.
- const std::pair<unsigned,int> *FixedSlot = FixedSpillSlots;
+ const TargetFrameInfo::SpillSlot *FixedSlot = FixedSpillSlots;
while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
- FixedSlot->first != Reg)
+ FixedSlot->Reg != Reg)
++FixedSlot;
if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
@@ -273,7 +273,7 @@
if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
} else {
// Spill it to the stack where we must.
- FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->second);
+ FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset);
}
I->setFrameIdx(FrameIdx);
Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h?rev=82909&r1=82908&r2=82909&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h Sun Sep 27 12:58:47 2009
@@ -88,189 +88,189 @@
}
// With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
- const std::pair<unsigned, int> *
+ const SpillSlot *
getCalleeSavedSpillSlots(unsigned &NumEntries) const {
// Early exit if not using the SVR4 ABI.
if (!TM.getSubtarget<PPCSubtarget>().isSVR4ABI()) {
NumEntries = 0;
return 0;
}
-
- static const std::pair<unsigned, int> Offsets[] = {
+
+ static const SpillSlot Offsets[] = {
// Floating-point register save area offsets.
- std::pair<unsigned, int>(PPC::F31, -8),
- std::pair<unsigned, int>(PPC::F30, -16),
- std::pair<unsigned, int>(PPC::F29, -24),
- std::pair<unsigned, int>(PPC::F28, -32),
- std::pair<unsigned, int>(PPC::F27, -40),
- std::pair<unsigned, int>(PPC::F26, -48),
- std::pair<unsigned, int>(PPC::F25, -56),
- std::pair<unsigned, int>(PPC::F24, -64),
- std::pair<unsigned, int>(PPC::F23, -72),
- std::pair<unsigned, int>(PPC::F22, -80),
- std::pair<unsigned, int>(PPC::F21, -88),
- std::pair<unsigned, int>(PPC::F20, -96),
- std::pair<unsigned, int>(PPC::F19, -104),
- std::pair<unsigned, int>(PPC::F18, -112),
- std::pair<unsigned, int>(PPC::F17, -120),
- std::pair<unsigned, int>(PPC::F16, -128),
- std::pair<unsigned, int>(PPC::F15, -136),
- std::pair<unsigned, int>(PPC::F14, -144),
-
+ {PPC::F31, -8},
+ {PPC::F30, -16},
+ {PPC::F29, -24},
+ {PPC::F28, -32},
+ {PPC::F27, -40},
+ {PPC::F26, -48},
+ {PPC::F25, -56},
+ {PPC::F24, -64},
+ {PPC::F23, -72},
+ {PPC::F22, -80},
+ {PPC::F21, -88},
+ {PPC::F20, -96},
+ {PPC::F19, -104},
+ {PPC::F18, -112},
+ {PPC::F17, -120},
+ {PPC::F16, -128},
+ {PPC::F15, -136},
+ {PPC::F14, -144},
+
// General register save area offsets.
- std::pair<unsigned, int>(PPC::R31, -4),
- std::pair<unsigned, int>(PPC::R30, -8),
- std::pair<unsigned, int>(PPC::R29, -12),
- std::pair<unsigned, int>(PPC::R28, -16),
- std::pair<unsigned, int>(PPC::R27, -20),
- std::pair<unsigned, int>(PPC::R26, -24),
- std::pair<unsigned, int>(PPC::R25, -28),
- std::pair<unsigned, int>(PPC::R24, -32),
- std::pair<unsigned, int>(PPC::R23, -36),
- std::pair<unsigned, int>(PPC::R22, -40),
- std::pair<unsigned, int>(PPC::R21, -44),
- std::pair<unsigned, int>(PPC::R20, -48),
- std::pair<unsigned, int>(PPC::R19, -52),
- std::pair<unsigned, int>(PPC::R18, -56),
- std::pair<unsigned, int>(PPC::R17, -60),
- std::pair<unsigned, int>(PPC::R16, -64),
- std::pair<unsigned, int>(PPC::R15, -68),
- std::pair<unsigned, int>(PPC::R14, -72),
+ {PPC::R31, -4},
+ {PPC::R30, -8},
+ {PPC::R29, -12},
+ {PPC::R28, -16},
+ {PPC::R27, -20},
+ {PPC::R26, -24},
+ {PPC::R25, -28},
+ {PPC::R24, -32},
+ {PPC::R23, -36},
+ {PPC::R22, -40},
+ {PPC::R21, -44},
+ {PPC::R20, -48},
+ {PPC::R19, -52},
+ {PPC::R18, -56},
+ {PPC::R17, -60},
+ {PPC::R16, -64},
+ {PPC::R15, -68},
+ {PPC::R14, -72},
// CR save area offset.
// FIXME SVR4: Disable CR save area for now.
-// std::pair<unsigned, int>(PPC::CR2, -4),
-// std::pair<unsigned, int>(PPC::CR3, -4),
-// std::pair<unsigned, int>(PPC::CR4, -4),
-// std::pair<unsigned, int>(PPC::CR2LT, -4),
-// std::pair<unsigned, int>(PPC::CR2GT, -4),
-// std::pair<unsigned, int>(PPC::CR2EQ, -4),
-// std::pair<unsigned, int>(PPC::CR2UN, -4),
-// std::pair<unsigned, int>(PPC::CR3LT, -4),
-// std::pair<unsigned, int>(PPC::CR3GT, -4),
-// std::pair<unsigned, int>(PPC::CR3EQ, -4),
-// std::pair<unsigned, int>(PPC::CR3UN, -4),
-// std::pair<unsigned, int>(PPC::CR4LT, -4),
-// std::pair<unsigned, int>(PPC::CR4GT, -4),
-// std::pair<unsigned, int>(PPC::CR4EQ, -4),
-// std::pair<unsigned, int>(PPC::CR4UN, -4),
+// {PPC::CR2, -4},
+// {PPC::CR3, -4},
+// {PPC::CR4, -4},
+// {PPC::CR2LT, -4},
+// {PPC::CR2GT, -4},
+// {PPC::CR2EQ, -4},
+// {PPC::CR2UN, -4},
+// {PPC::CR3LT, -4},
+// {PPC::CR3GT, -4},
+// {PPC::CR3EQ, -4},
+// {PPC::CR3UN, -4},
+// {PPC::CR4LT, -4},
+// {PPC::CR4GT, -4},
+// {PPC::CR4EQ, -4},
+// {PPC::CR4UN, -4},
// VRSAVE save area offset.
- std::pair<unsigned, int>(PPC::VRSAVE, -4),
-
+ {PPC::VRSAVE, -4},
+
// Vector register save area
- std::pair<unsigned, int>(PPC::V31, -16),
- std::pair<unsigned, int>(PPC::V30, -32),
- std::pair<unsigned, int>(PPC::V29, -48),
- std::pair<unsigned, int>(PPC::V28, -64),
- std::pair<unsigned, int>(PPC::V27, -80),
- std::pair<unsigned, int>(PPC::V26, -96),
- std::pair<unsigned, int>(PPC::V25, -112),
- std::pair<unsigned, int>(PPC::V24, -128),
- std::pair<unsigned, int>(PPC::V23, -144),
- std::pair<unsigned, int>(PPC::V22, -160),
- std::pair<unsigned, int>(PPC::V21, -176),
- std::pair<unsigned, int>(PPC::V20, -192)
+ {PPC::V31, -16},
+ {PPC::V30, -32},
+ {PPC::V29, -48},
+ {PPC::V28, -64},
+ {PPC::V27, -80},
+ {PPC::V26, -96},
+ {PPC::V25, -112},
+ {PPC::V24, -128},
+ {PPC::V23, -144},
+ {PPC::V22, -160},
+ {PPC::V21, -176},
+ {PPC::V20, -192}
};
-
- static const std::pair<unsigned, int> Offsets64[] = {
+
+ static const SpillSlot Offsets64[] = {
// Floating-point register save area offsets.
- std::pair<unsigned, int>(PPC::F31, -8),
- std::pair<unsigned, int>(PPC::F30, -16),
- std::pair<unsigned, int>(PPC::F29, -24),
- std::pair<unsigned, int>(PPC::F28, -32),
- std::pair<unsigned, int>(PPC::F27, -40),
- std::pair<unsigned, int>(PPC::F26, -48),
- std::pair<unsigned, int>(PPC::F25, -56),
- std::pair<unsigned, int>(PPC::F24, -64),
- std::pair<unsigned, int>(PPC::F23, -72),
- std::pair<unsigned, int>(PPC::F22, -80),
- std::pair<unsigned, int>(PPC::F21, -88),
- std::pair<unsigned, int>(PPC::F20, -96),
- std::pair<unsigned, int>(PPC::F19, -104),
- std::pair<unsigned, int>(PPC::F18, -112),
- std::pair<unsigned, int>(PPC::F17, -120),
- std::pair<unsigned, int>(PPC::F16, -128),
- std::pair<unsigned, int>(PPC::F15, -136),
- std::pair<unsigned, int>(PPC::F14, -144),
+ {PPC::F31, -8},
+ {PPC::F30, -16},
+ {PPC::F29, -24},
+ {PPC::F28, -32},
+ {PPC::F27, -40},
+ {PPC::F26, -48},
+ {PPC::F25, -56},
+ {PPC::F24, -64},
+ {PPC::F23, -72},
+ {PPC::F22, -80},
+ {PPC::F21, -88},
+ {PPC::F20, -96},
+ {PPC::F19, -104},
+ {PPC::F18, -112},
+ {PPC::F17, -120},
+ {PPC::F16, -128},
+ {PPC::F15, -136},
+ {PPC::F14, -144},
// General register save area offsets.
// FIXME 64-bit SVR4: Are 32-bit registers actually allocated in 64-bit
// mode?
- std::pair<unsigned, int>(PPC::R31, -4),
- std::pair<unsigned, int>(PPC::R30, -12),
- std::pair<unsigned, int>(PPC::R29, -20),
- std::pair<unsigned, int>(PPC::R28, -28),
- std::pair<unsigned, int>(PPC::R27, -36),
- std::pair<unsigned, int>(PPC::R26, -44),
- std::pair<unsigned, int>(PPC::R25, -52),
- std::pair<unsigned, int>(PPC::R24, -60),
- std::pair<unsigned, int>(PPC::R23, -68),
- std::pair<unsigned, int>(PPC::R22, -76),
- std::pair<unsigned, int>(PPC::R21, -84),
- std::pair<unsigned, int>(PPC::R20, -92),
- std::pair<unsigned, int>(PPC::R19, -100),
- std::pair<unsigned, int>(PPC::R18, -108),
- std::pair<unsigned, int>(PPC::R17, -116),
- std::pair<unsigned, int>(PPC::R16, -124),
- std::pair<unsigned, int>(PPC::R15, -132),
- std::pair<unsigned, int>(PPC::R14, -140),
-
- std::pair<unsigned, int>(PPC::X31, -8),
- std::pair<unsigned, int>(PPC::X30, -16),
- std::pair<unsigned, int>(PPC::X29, -24),
- std::pair<unsigned, int>(PPC::X28, -32),
- std::pair<unsigned, int>(PPC::X27, -40),
- std::pair<unsigned, int>(PPC::X26, -48),
- std::pair<unsigned, int>(PPC::X25, -56),
- std::pair<unsigned, int>(PPC::X24, -64),
- std::pair<unsigned, int>(PPC::X23, -72),
- std::pair<unsigned, int>(PPC::X22, -80),
- std::pair<unsigned, int>(PPC::X21, -88),
- std::pair<unsigned, int>(PPC::X20, -96),
- std::pair<unsigned, int>(PPC::X19, -104),
- std::pair<unsigned, int>(PPC::X18, -112),
- std::pair<unsigned, int>(PPC::X17, -120),
- std::pair<unsigned, int>(PPC::X16, -128),
- std::pair<unsigned, int>(PPC::X15, -136),
- std::pair<unsigned, int>(PPC::X14, -144),
+ {PPC::R31, -4},
+ {PPC::R30, -12},
+ {PPC::R29, -20},
+ {PPC::R28, -28},
+ {PPC::R27, -36},
+ {PPC::R26, -44},
+ {PPC::R25, -52},
+ {PPC::R24, -60},
+ {PPC::R23, -68},
+ {PPC::R22, -76},
+ {PPC::R21, -84},
+ {PPC::R20, -92},
+ {PPC::R19, -100},
+ {PPC::R18, -108},
+ {PPC::R17, -116},
+ {PPC::R16, -124},
+ {PPC::R15, -132},
+ {PPC::R14, -140},
+
+ {PPC::X31, -8},
+ {PPC::X30, -16},
+ {PPC::X29, -24},
+ {PPC::X28, -32},
+ {PPC::X27, -40},
+ {PPC::X26, -48},
+ {PPC::X25, -56},
+ {PPC::X24, -64},
+ {PPC::X23, -72},
+ {PPC::X22, -80},
+ {PPC::X21, -88},
+ {PPC::X20, -96},
+ {PPC::X19, -104},
+ {PPC::X18, -112},
+ {PPC::X17, -120},
+ {PPC::X16, -128},
+ {PPC::X15, -136},
+ {PPC::X14, -144},
// CR save area offset.
// FIXME SVR4: Disable CR save area for now.
-// std::pair<unsigned, int>(PPC::CR2, -4),
-// std::pair<unsigned, int>(PPC::CR3, -4),
-// std::pair<unsigned, int>(PPC::CR4, -4),
-// std::pair<unsigned, int>(PPC::CR2LT, -4),
-// std::pair<unsigned, int>(PPC::CR2GT, -4),
-// std::pair<unsigned, int>(PPC::CR2EQ, -4),
-// std::pair<unsigned, int>(PPC::CR2UN, -4),
-// std::pair<unsigned, int>(PPC::CR3LT, -4),
-// std::pair<unsigned, int>(PPC::CR3GT, -4),
-// std::pair<unsigned, int>(PPC::CR3EQ, -4),
-// std::pair<unsigned, int>(PPC::CR3UN, -4),
-// std::pair<unsigned, int>(PPC::CR4LT, -4),
-// std::pair<unsigned, int>(PPC::CR4GT, -4),
-// std::pair<unsigned, int>(PPC::CR4EQ, -4),
-// std::pair<unsigned, int>(PPC::CR4UN, -4),
+// {PPC::CR2, -4},
+// {PPC::CR3, -4},
+// {PPC::CR4, -4},
+// {PPC::CR2LT, -4},
+// {PPC::CR2GT, -4},
+// {PPC::CR2EQ, -4},
+// {PPC::CR2UN, -4},
+// {PPC::CR3LT, -4},
+// {PPC::CR3GT, -4},
+// {PPC::CR3EQ, -4},
+// {PPC::CR3UN, -4},
+// {PPC::CR4LT, -4},
+// {PPC::CR4GT, -4},
+// {PPC::CR4EQ, -4},
+// {PPC::CR4UN, -4},
// VRSAVE save area offset.
- std::pair<unsigned, int>(PPC::VRSAVE, -4),
+ {PPC::VRSAVE, -4},
// Vector register save area
- std::pair<unsigned, int>(PPC::V31, -16),
- std::pair<unsigned, int>(PPC::V30, -32),
- std::pair<unsigned, int>(PPC::V29, -48),
- std::pair<unsigned, int>(PPC::V28, -64),
- std::pair<unsigned, int>(PPC::V27, -80),
- std::pair<unsigned, int>(PPC::V26, -96),
- std::pair<unsigned, int>(PPC::V25, -112),
- std::pair<unsigned, int>(PPC::V24, -128),
- std::pair<unsigned, int>(PPC::V23, -144),
- std::pair<unsigned, int>(PPC::V22, -160),
- std::pair<unsigned, int>(PPC::V21, -176),
- std::pair<unsigned, int>(PPC::V20, -192)
+ {PPC::V31, -16},
+ {PPC::V30, -32},
+ {PPC::V29, -48},
+ {PPC::V28, -64},
+ {PPC::V27, -80},
+ {PPC::V26, -96},
+ {PPC::V25, -112},
+ {PPC::V24, -128},
+ {PPC::V23, -144},
+ {PPC::V22, -160},
+ {PPC::V21, -176},
+ {PPC::V20, -192}
};
-
+
if (TM.getSubtarget<PPCSubtarget>().isPPC64()) {
NumEntries = array_lengthof(Offsets64);
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