[llvm-commits] [llvm] r81265 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ lib/Target/X86/AsmPrinter/ test/CodeGen/X86/
Chris Lattner
sabre at nondot.org
Tue Sep 8 16:05:44 PDT 2009
Author: lattner
Date: Tue Sep 8 18:05:44 2009
New Revision: 81265
URL: http://llvm.org/viewvc/llvm-project?rev=81265&view=rev
Log:
change selectiondag to add the sign extended versions of immediate operands
to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll
llvm/trunk/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
llvm/trunk/test/CodeGen/X86/change-compare-stride-0.ll
llvm/trunk/test/CodeGen/X86/lea.ll
llvm/trunk/test/CodeGen/X86/mingw-alloca.ll
llvm/trunk/test/CodeGen/X86/narrow_op-2.ll
llvm/trunk/test/CodeGen/X86/pr1489.ll
llvm/trunk/test/CodeGen/X86/remat-mov-1.ll
llvm/trunk/test/CodeGen/X86/sse3.ll
llvm/trunk/test/CodeGen/X86/test-shrink.ll
llvm/trunk/test/CodeGen/X86/vec_shuffle-30.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp Tue Sep 8 18:05:44 2009
@@ -282,7 +282,7 @@
if (Op.isMachineOpcode()) {
AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap);
} else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
- MI->addOperand(MachineOperand::CreateImm(C->getZExtValue()));
+ MI->addOperand(MachineOperand::CreateImm(C->getSExtValue()));
} else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) {
const ConstantFP *CFP = F->getConstantFPValue();
MI->addOperand(MachineOperand::CreateFPImm(CFP));
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Tue Sep 8 18:05:44 2009
@@ -41,7 +41,7 @@
STATISTIC(EmittedInsts, "Number of machine instrs printed");
static cl::opt<bool> NewAsmPrinter("experimental-asm-printer",
- cl::Hidden);
+ cl::Hidden, cl::init(false));
//===----------------------------------------------------------------------===//
// Primitive Helper Functions.
Modified: llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-11-28-Memcpy.ll Tue Sep 8 18:05:44 2009
@@ -1,8 +1,6 @@
; PR1022, PR1023
-; RUN: llvm-as < %s | llc -march=x86 | \
-; RUN: grep 3721182122 | count 2
-; RUN: llvm-as < %s | llc -march=x86 | \
-; RUN: grep -E {movl _?bytes2} | count 1
+; RUN: llc < %s -march=x86 | grep -- -573785174 | count 2
+; RUN: llc < %s -march=x86 | grep -E {movl _?bytes2} | count 1
@fmt = constant [4 x i8] c"%x\0A\00" ; <[4 x i8]*> [#uses=2]
@bytes = constant [4 x i8] c"\AA\BB\CC\DD" ; <[4 x i8]*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-09-18-ShuffleXformBug.ll Tue Sep 8 18:05:44 2009
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep 170
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep -- -86
define i16 @f(<4 x float>* %tmp116117.i1061.i) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bit.ll Tue Sep 8 18:05:44 2009
@@ -1,5 +1,4 @@
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551 | count 1
-; ModuleID = '<stdin>'
+; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep -- -1985 | count 1
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-11-29-DivideConstant16bitSigned.ll Tue Sep 8 18:05:44 2009
@@ -1,5 +1,4 @@
-; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep 63551
-; ModuleID = '<stdin>'
+; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1985
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/change-compare-stride-0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/change-compare-stride-0.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/change-compare-stride-0.ll (original)
+++ llvm/trunk/test/CodeGen/X86/change-compare-stride-0.ll Tue Sep 8 18:05:44 2009
@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -march=x86 > %t
-; RUN: grep {cmpl \$4294966818,} %t
+; RUN: llc < %s -march=x86 > %t
+; RUN: grep {cmpl \$-478,} %t
; RUN: not grep inc %t
; RUN: not grep {leal 1(} %t
; RUN: not grep {leal -1(} %t
Modified: llvm/trunk/test/CodeGen/X86/lea.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lea.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lea.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lea.ll Tue Sep 8 18:05:44 2009
@@ -28,7 +28,7 @@
ret i32 %x_offs
; CHECK: test2:
; CHECK: leal -5(%rdi), %eax
-; CHECK: andl $4294967292, %eax
+; CHECK: andl $-4, %eax
; CHECK: negl %eax
; CHECK: leal -4(%rdi,%rax), %eax
}
Modified: llvm/trunk/test/CodeGen/X86/mingw-alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mingw-alloca.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mingw-alloca.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mingw-alloca.ll Tue Sep 8 18:05:44 2009
@@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -o %t
; RUN: grep __alloca %t | count 2
-; RUN: grep 4294967288 %t
+; RUN: grep -- -16 %t
; RUN: grep {pushl %eax} %t
; RUN: grep 8028 %t | count 2
Modified: llvm/trunk/test/CodeGen/X86/narrow_op-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/narrow_op-2.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/narrow_op-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/narrow_op-2.ll Tue Sep 8 18:05:44 2009
@@ -1,12 +1,14 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | count 2
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 254
-; RUN: llvm-as < %s | llc -march=x86-64 | grep andb | grep 253
+; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s
%struct.bf = type { i64, i16, i16, i32 }
@bfi = external global %struct.bf*
define void @t1() nounwind ssp {
entry:
+
+; CHECK: andb $-2, 10(
+; CHECK: andb $-3, 10(
+
%0 = load %struct.bf** @bfi, align 8
%1 = getelementptr %struct.bf* %0, i64 0, i32 1
%2 = bitcast i16* %1 to i32*
Modified: llvm/trunk/test/CodeGen/X86/pr1489.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr1489.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr1489.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr1489.ll Tue Sep 8 18:05:44 2009
@@ -1,12 +1,12 @@
; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 1082126238 | count 3
-; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep 3058016715 | count 1
+; RUN: llvm-as < %s | llc -disable-fp-elim -O0 -mcpu=i486 | grep -- -1236950581 | count 1
;; magic constants are 3.999f and half of 3.999
; ModuleID = '1489.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
@.str = internal constant [13 x i8] c"%d %d %d %d\0A\00" ; <[13 x i8]*> [#uses=1]
-define i32 @quux() {
+define i32 @quux() nounwind {
entry:
%tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
%tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
@@ -16,7 +16,7 @@
declare i32 @lrintf(float)
-define i32 @foo() {
+define i32 @foo() nounwind {
entry:
%tmp1 = tail call i32 @lrint( double 3.999000e+00 ) ; <i32> [#uses=1]
%tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
@@ -26,7 +26,7 @@
declare i32 @lrint(double)
-define i32 @bar() {
+define i32 @bar() nounwind {
entry:
%tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
%tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
@@ -34,7 +34,7 @@
ret i32 %tmp23
}
-define i32 @baz() {
+define i32 @baz() nounwind {
entry:
%tmp1 = tail call i32 @lrintf( float 0x400FFDF3C0000000 ) ; <i32> [#uses=1]
%tmp2 = icmp slt i32 %tmp1, 1 ; <i1> [#uses=1]
@@ -42,7 +42,7 @@
ret i32 %tmp23
}
-define i32 @main() {
+define i32 @main() nounwind {
entry:
%tmp = tail call i32 @baz( ) ; <i32> [#uses=1]
%tmp1 = tail call i32 @bar( ) ; <i32> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/remat-mov-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/remat-mov-1.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/remat-mov-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/remat-mov-1.ll Tue Sep 8 18:05:44 2009
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep 4294967295 | grep mov | count 2
+; RUN: llvm-as < %s | llc -march=x86 | grep -- -1 | grep mov | count 2
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.ImgT = type { i8, i8*, i8*, %struct.FILE*, i32, i32, i32, i32, i8*, double*, float*, float*, float*, i32*, double, double, i32*, double*, i32*, i32* }
Modified: llvm/trunk/test/CodeGen/X86/sse3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse3.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse3.ll Tue Sep 8 18:05:44 2009
@@ -92,8 +92,8 @@
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 >
ret <8 x i16> %tmp
; X64: t7:
-; X64: pshuflw $176, %xmm0, %xmm0
-; X64: pshufhw $200, %xmm0, %xmm0
+; X64: pshuflw $-80, %xmm0, %xmm0
+; X64: pshufhw $-56, %xmm0, %xmm0
; X64: ret
}
@@ -120,8 +120,8 @@
store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res
ret void
; X64: t8:
-; X64: pshuflw $198, (%rsi), %xmm0
-; X64: pshufhw $198, %xmm0, %xmm0
+; X64: pshuflw $-58, (%rsi), %xmm0
+; X64: pshufhw $-58, %xmm0, %xmm0
; X64: movaps %xmm0, (%rdi)
; X64: ret
}
@@ -243,7 +243,7 @@
; X64: t15:
; X64: pextrw $7, %xmm0, %eax
; X64: punpcklqdq %xmm1, %xmm0
-; X64: pshuflw $128, %xmm0, %xmm0
+; X64: pshuflw $-128, %xmm0, %xmm0
; X64: pinsrw $2, %eax, %xmm0
; X64: ret
}
@@ -265,7 +265,7 @@
; X64: movd %xmm1, %edx
; X64: pinsrw $0, %edx, %xmm1
; X64: movzbl %cl, %ecx
-; X64: andw $65280, %ax
+; X64: andw $-256, %ax
; X64: orw %cx, %ax
; X64: movaps %xmm1, %xmm0
; X64: pinsrw $1, %eax, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/test-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/test-shrink.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/test-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/X86/test-shrink.ll Tue Sep 8 18:05:44 2009
@@ -104,10 +104,10 @@
ret void
}
; CHECK-64: g64x16:
-; CHECK-64: testw $32896, %di
+; CHECK-64: testw $-32640, %di
; CHECK-64: ret
; CHECK-32: g64x16:
-; CHECK-32: testw $32896, %ax
+; CHECK-32: testw $-32640, %ax
; CHECK-32: ret
define void @g64x16(i64 inreg %x) nounwind {
%t = and i64 %x, 32896
@@ -121,10 +121,10 @@
ret void
}
; CHECK-64: g32x16:
-; CHECK-64: testw $32896, %di
+; CHECK-64: testw $-32640, %di
; CHECK-64: ret
; CHECK-32: g32x16:
-; CHECK-32: testw $32896, %ax
+; CHECK-32: testw $-32640, %ax
; CHECK-32: ret
define void @g32x16(i32 inreg %x) nounwind {
%t = and i32 %x, 32896
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-30.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-30.ll?rev=81265&r1=81264&r2=81265&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-30.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-30.ll Tue Sep 8 18:05:44 2009
@@ -1,11 +1,11 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -disable-mmx -o %t
-; RUN: grep pshufhw %t | grep 161 | count 1
+; RUN: grep pshufhw %t | grep -- -95 | count 1
; RUN: grep shufps %t | count 1
; RUN: not grep pslldq %t
; Test case when creating pshufhw, we incorrectly set the higher order bit
; for an undef,
-define void @test(<8 x i16>* %dest, <8 x i16> %in) {
+define void @test(<8 x i16>* %dest, <8 x i16> %in) nounwind {
entry:
%0 = load <8 x i16>* %dest
%1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14>
@@ -14,7 +14,7 @@
}
; A test case where we shouldn't generate a punpckldq but a pshufd and a pslldq
-define void @test2(<4 x i32>* %dest, <4 x i32> %in) {
+define void @test2(<4 x i32>* %dest, <4 x i32> %in) nounwind {
entry:
%0 = shufflevector <4 x i32> %in, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> < i32 undef, i32 5, i32 undef, i32 2>
store <4 x i32> %0, <4 x i32>* %dest
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