[llvm-commits] [llvm] r79554 - /llvm/trunk/lib/Target/X86/X86InstrSSE.td

Sean Callanan scallanan at apple.com
Thu Aug 20 11:24:28 PDT 2009


Author: spyffe
Date: Thu Aug 20 13:24:27 2009
New Revision: 79554

URL: http://llvm.org/viewvc/llvm-project?rev=79554&view=rev
Log:
Fixed PCMPESTRM128 to have opcode 0x60 instead of 0x62, as specified by the
Intel documentation.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=79554&r1=79553&r2=79554&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Aug 20 13:24:27 2009
@@ -3792,11 +3792,11 @@
 }
 
 let Defs = [XMM0, EFLAGS], Uses = [EAX, EDX] in {
-def PCMPESTRM128rr : SS42AI<0x62, MRMSrcReg, (outs),
+def PCMPESTRM128rr : SS42AI<0x60, MRMSrcReg, (outs),
 			    (ins VR128:$src1, VR128:$src3, i8imm:$src5),
 		     "pcmpestrm\t{$src5, $src3, $src1|$src1, $src3, $src5}",
 		     []>, OpSize;
-def PCMPESTRM128rm : SS42AI<0x62, MRMSrcMem, (outs),
+def PCMPESTRM128rm : SS42AI<0x60, MRMSrcMem, (outs),
 			    (ins VR128:$src1, i128mem:$src3, i8imm:$src5),
 		     "pcmpestrm\t{$src5, $src3, $src1|$src1, $src3, $src5}",
 		     []>, OpSize;





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