[llvm-commits] [llvm] r78731 - in /llvm/trunk: include/llvm/Target/Target.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrMMX.td lib/Target/X86/X86InstrSSE.td utils/TableGen/AsmMatcherEmitter.cpp

[Daniel Dunbar]

On Tue, Aug 11, 2009 at 3:28 PM, Eli Friedman<eli.friedman at gmail.com> wrote:
> On Tue, Aug 11, 2009 at 3:17 PM, Daniel Dunbar<daniel at zuster.org> wrote:
>> Author: ddunbar
>> Date: Tue Aug 11 17:17:52 2009
>> New Revision: 78731
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=78731&view=rev
>> Log:
>> Add 'isCodeGenOnly' bit to Instruction .td records.
>>  - Used to mark fake instructions which don't correspond to an actual machine
>>   instruction (or are duplicates of a real instruction). This is to be used for
>>   "special cases" in the .td files, which should be ignored by things like the
>>   assembler and disassembler. We still need a good solution to handle pervasive
>>   duplication, like with the Int_ instructions.
>
> If you don't want to mess with converting the duplicated ones to
> patterns, I'd suggest just marking them isCodeGenOnly.

The problem is there are so many of them, scattered over the .td
files, that this is really tedious and noisy. Thats what makes me
think another approach may be in order.

For example, I could add a mechanism so that the .td file could
specify an arbitrary ordering of the register classes, so that FP32
would be preferred over VR128, for example. I can't decide whether
this is a good or bad idea though...

Currently the only thing this actually blocks is turning the assembler
"ambiguous" warning into a hard error. Otherwise it doesn't really
matter which version gets match since they are identical instructions.

 - Daniel