[llvm-commits] [llvm] r78625 - in /llvm/trunk: docs/ include/llvm/ include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/AsmPrinter/ lib/CodeGen/SelectionDAG/ lib/ExecutionEngine/JIT/ lib/Target/ lib/Target/ARM/ lib/Target/ARM/AsmPrinter/ lib/Target/CellSPU/ lib/Target/PowerPC/ lib/Target/X86/ tools/lto/

[Jim Grosbach]

On Aug 10, 2009, at 5:53 PM, Evan Cheng wrote:

>>
>> =
>> =====================================================================
>> --- llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp (original)
>> +++ llvm/trunk/lib/CodeGen/AsmPrinter/DwarfException.cpp Mon Aug 10
>> 19:09:57 2009
>> @@ -364,6 +364,7 @@
>> /// try-range address.
>> void DwarfException::
>> ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
>> +                     std::map<unsigned,CallSiteEntry*>
>> &CallSiteIndexMap,
>
> Are indices continuous integers? If so, perhaps it would be better to
> use IndexedMap or at least DenseMap?
>

Unfortunately not contiguous at the moment. That's one of the (many)  
things I plan to do something about after everything's working.

>> +    if (TAI->getExceptionHandlingType() == ExceptionHandling::SjLj)
>> +      SizeSites += TargetAsmInfo::getULEB128Size(i);
>> +      // FIXME: 'i' above should be the landing pad index
>
> I don't quite understand this fixme comment.
>

What's being encoded is the landing pad (call site) index, but what's  
being checked here is the count as we go through them. It's close  
enough for now, but not quite right. Specifically, it doesn't account  
for gaps in index values.

>
> You need to update ARMBaseInstrInfo::GetInstSizeInBytes. It's no
> longer 12-bytes long.
>
> Please add a Thumb2 specific instruction, this obviously is ARM
> specific only. Please take care not to use "add pc, pc, #0", its
> semantics is undefined in Thumb2 mode. Also please make sure you use
> universal syntax for Thumb2.
>

OK. Doing this now.

Thanks for the feedback.

-Jim