[llvm-commits] [llvm] r78598 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td test/MC/AsmParser/x86_instructions.s

[Daniel Dunbar]

Author: ddunbar
Date: Mon Aug 10 16:06:41 2009
New Revision: 78598

URL: http://llvm.org/viewvc/llvm-project?rev=78598&view=rev
Log:
llvm-mc/AsmParser: Disambiguate i64i8imm.

Modified:
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/test/MC/AsmParser/x86_instructions.s

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=78598&r1=78597&r2=78598&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Mon Aug 10 16:06:41 2009
@@ -28,7 +28,9 @@
 
 
 // 64-bits but only 8 bits are significant.
-def i64i8imm   : Operand<i64>;
+def i64i8imm   : Operand<i64> {
+  let ParserMatchClass = ImmSExt8AsmOperand;
+}
 
 def lea64mem : Operand<i64> {
   let PrintMethod = "printlea64mem";

Modified: llvm/trunk/test/MC/AsmParser/x86_instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/x86_instructions.s?rev=78598&r1=78597&r2=78598&view=diff

==============================================================================
--- llvm/trunk/test/MC/AsmParser/x86_instructions.s (original)
+++ llvm/trunk/test/MC/AsmParser/x86_instructions.s Mon Aug 10 16:06:41 2009
@@ -1,6 +1,6 @@
 // FIXME: Switch back to FileCheck once we print actual instructions
         
-// RUN: llvm-mc -triple i386-unknown-unknown %s > %t
+// RUN: llvm-mc -triple x86_64-unknown-unknown %s > %t
 
 // RUN: grep {MCInst(opcode=.*, operands=.reg:2, reg:0, reg:2.)} %t
         subb %al, %al
@@ -29,4 +29,10 @@
 // RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
         subl $256, %eax
 
+// FIXME: Check that this matches XOR64ri8
+// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:1.)} %t
+        xorq $1, %eax
         
+// FIXME: Check that this matches XOR64ri32
+// RUN: grep {MCInst(opcode=.*, operands=.reg:19, reg:0, val:256.)} %t
+        xorq $256, %eax