[llvm-commits] [llvm] r78595 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/Target/ARM/ARMISelLowering.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp
Owen Anderson
resistor at mac.com
Mon Aug 10 13:46:16 PDT 2009
Author: resistor
Date: Mon Aug 10 15:46:15 2009
New Revision: 78595
URL: http://llvm.org/viewvc/llvm-project?rev=78595&view=rev
Log:
SimpleValueType-ify a few more methods on TargetLowering.
Modified:
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=78595&r1=78594&r2=78595&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Mon Aug 10 15:46:15 2009
@@ -955,82 +955,80 @@
/// setLoadExtAction - Indicate that the specified load with extension does
/// not work with the with specified type and indicate what to do about it.
- void setLoadExtAction(unsigned ExtType, MVT VT,
+ void setLoadExtAction(unsigned ExtType, MVT::SimpleValueType VT,
LegalizeAction Action) {
- assert((unsigned)VT.getSimpleVT() < sizeof(LoadExtActions[0])*4 &&
+ assert((unsigned)VT < sizeof(LoadExtActions[0])*4 &&
ExtType < array_lengthof(LoadExtActions) &&
"Table isn't big enough!");
- LoadExtActions[ExtType] &= ~(uint64_t(3UL) << VT.getSimpleVT()*2);
- LoadExtActions[ExtType] |= (uint64_t)Action << VT.getSimpleVT()*2;
+ LoadExtActions[ExtType] &= ~(uint64_t(3UL) << VT*2);
+ LoadExtActions[ExtType] |= (uint64_t)Action << VT*2;
}
/// setTruncStoreAction - Indicate that the specified truncating store does
/// not work with the with specified type and indicate what to do about it.
- void setTruncStoreAction(MVT ValVT, MVT MemVT,
+ void setTruncStoreAction(MVT::SimpleValueType ValVT,
+ MVT::SimpleValueType MemVT,
LegalizeAction Action) {
- assert((unsigned)ValVT.getSimpleVT() < array_lengthof(TruncStoreActions) &&
- (unsigned)MemVT.getSimpleVT() < sizeof(TruncStoreActions[0])*4 &&
+ assert((unsigned)ValVT < array_lengthof(TruncStoreActions) &&
+ (unsigned)MemVT < sizeof(TruncStoreActions[0])*4 &&
"Table isn't big enough!");
- TruncStoreActions[ValVT.getSimpleVT()] &= ~(uint64_t(3UL) <<
- MemVT.getSimpleVT()*2);
- TruncStoreActions[ValVT.getSimpleVT()] |= (uint64_t)Action <<
- MemVT.getSimpleVT()*2;
+ TruncStoreActions[ValVT] &= ~(uint64_t(3UL) << MemVT*2);
+ TruncStoreActions[ValVT] |= (uint64_t)Action << MemVT*2;
}
/// setIndexedLoadAction - Indicate that the specified indexed load does or
/// does not work with the with specified type and indicate what to do abort
/// it. NOTE: All indexed mode loads are initialized to Expand in
/// TargetLowering.cpp
- void setIndexedLoadAction(unsigned IdxMode, MVT VT,
+ void setIndexedLoadAction(unsigned IdxMode, MVT::SimpleValueType VT,
LegalizeAction Action) {
- assert((unsigned)VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
+ assert((unsigned)VT < MVT::LAST_VALUETYPE &&
IdxMode < array_lengthof(IndexedModeActions[0][0]) &&
"Table isn't big enough!");
- IndexedModeActions[(unsigned)VT.getSimpleVT()][0][IdxMode] = (uint8_t)Action;
+ IndexedModeActions[(unsigned)VT][0][IdxMode] = (uint8_t)Action;
}
/// setIndexedStoreAction - Indicate that the specified indexed store does or
/// does not work with the with specified type and indicate what to do about
/// it. NOTE: All indexed mode stores are initialized to Expand in
/// TargetLowering.cpp
- void setIndexedStoreAction(unsigned IdxMode, MVT VT,
+ void setIndexedStoreAction(unsigned IdxMode, MVT::SimpleValueType VT,
LegalizeAction Action) {
- assert((unsigned)VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
+ assert((unsigned)VT < MVT::LAST_VALUETYPE &&
IdxMode < array_lengthof(IndexedModeActions[0][1] ) &&
"Table isn't big enough!");
- IndexedModeActions[(unsigned)VT.getSimpleVT()][1][IdxMode] = (uint8_t)Action;
+ IndexedModeActions[(unsigned)VT][1][IdxMode] = (uint8_t)Action;
}
/// setConvertAction - Indicate that the specified conversion does or does
/// not work with the with specified type and indicate what to do about it.
- void setConvertAction(MVT FromVT, MVT ToVT,
+ void setConvertAction(MVT::SimpleValueType FromVT, MVT::SimpleValueType ToVT,
LegalizeAction Action) {
- assert((unsigned)FromVT.getSimpleVT() < array_lengthof(ConvertActions) &&
- (unsigned)ToVT.getSimpleVT() < sizeof(ConvertActions[0])*4 &&
+ assert((unsigned)FromVT < array_lengthof(ConvertActions) &&
+ (unsigned)ToVT < sizeof(ConvertActions[0])*4 &&
"Table isn't big enough!");
- ConvertActions[FromVT.getSimpleVT()] &= ~(uint64_t(3UL) <<
- ToVT.getSimpleVT()*2);
- ConvertActions[FromVT.getSimpleVT()] |= (uint64_t)Action <<
- ToVT.getSimpleVT()*2;
+ ConvertActions[FromVT] &= ~(uint64_t(3UL) << ToVT*2);
+ ConvertActions[FromVT] |= (uint64_t)Action << ToVT*2;
}
/// setCondCodeAction - Indicate that the specified condition code is or isn't
/// supported on the target and indicate what to do about it.
- void setCondCodeAction(ISD::CondCode CC, MVT VT, LegalizeAction Action) {
- assert((unsigned)VT.getSimpleVT() < sizeof(CondCodeActions[0])*4 &&
+ void setCondCodeAction(ISD::CondCode CC, MVT::SimpleValueType VT,
+ LegalizeAction Action) {
+ assert((unsigned)VT < sizeof(CondCodeActions[0])*4 &&
(unsigned)CC < array_lengthof(CondCodeActions) &&
"Table isn't big enough!");
- CondCodeActions[(unsigned)CC] &= ~(uint64_t(3UL) << VT.getSimpleVT()*2);
- CondCodeActions[(unsigned)CC] |= (uint64_t)Action << VT.getSimpleVT()*2;
+ CondCodeActions[(unsigned)CC] &= ~(uint64_t(3UL) << VT*2);
+ CondCodeActions[(unsigned)CC] |= (uint64_t)Action << VT*2;
}
/// AddPromotedToType - If Opc/OrigVT is specified as being promoted, the
/// promotion code defaults to trying a larger integer/fp until it can find
/// one that works. If that default is insufficient, this method can be used
/// by the target to override the default.
- void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
- PromoteToType[std::make_pair(Opc, OrigVT.getSimpleVT())] =
- DestVT.getSimpleVT();
+ void AddPromotedToType(unsigned Opc, MVT::SimpleValueType OrigVT,
+ MVT::SimpleValueType DestVT) {
+ PromoteToType[std::make_pair(Opc, OrigVT)] = DestVT;
}
/// addLegalFPImmediate - Indicate that this target can instruction select
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=78595&r1=78594&r2=78595&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Aug 10 15:46:15 2009
@@ -62,10 +62,12 @@
MVT PromotedBitwiseVT) {
if (VT != PromotedLdStVT) {
setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::LOAD, VT, PromotedLdStVT);
+ AddPromotedToType (ISD::LOAD, VT.getSimpleVT(),
+ PromotedLdStVT.getSimpleVT());
setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::STORE, VT, PromotedLdStVT);
+ AddPromotedToType (ISD::STORE, VT.getSimpleVT(),
+ PromotedLdStVT.getSimpleVT());
}
MVT ElemTy = VT.getVectorElementType();
@@ -86,11 +88,14 @@
// Promote all bit-wise operations.
if (VT.isInteger() && VT != PromotedBitwiseVT) {
setOperationAction(ISD::AND, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::AND, VT, PromotedBitwiseVT);
+ AddPromotedToType (ISD::AND, VT.getSimpleVT(),
+ PromotedBitwiseVT.getSimpleVT());
setOperationAction(ISD::OR, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::OR, VT, PromotedBitwiseVT);
+ AddPromotedToType (ISD::OR, VT.getSimpleVT(),
+ PromotedBitwiseVT.getSimpleVT());
setOperationAction(ISD::XOR, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::XOR, VT, PromotedBitwiseVT);
+ AddPromotedToType (ISD::XOR, VT.getSimpleVT(),
+ PromotedBitwiseVT.getSimpleVT());
}
}
Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=78595&r1=78594&r2=78595&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Mon Aug 10 15:46:15 2009
@@ -177,7 +177,7 @@
setLoadExtAction(ISD::SEXTLOAD, VT, Custom);
for (unsigned stype = sctype - 1; stype >= (unsigned) MVT::i8; --stype) {
- MVT StoreVT = (MVT::SimpleValueType) stype;
+ MVT::SimpleValueType StoreVT = (MVT::SimpleValueType) stype;
setTruncStoreAction(VT, StoreVT, Expand);
}
}
@@ -190,7 +190,7 @@
setOperationAction(ISD::STORE, VT, Custom);
for (unsigned stype = sctype - 1; stype >= (unsigned) MVT::f32; --stype) {
- MVT StoreVT = (MVT::SimpleValueType) stype;
+ MVT::SimpleValueType StoreVT = (MVT::SimpleValueType) stype;
setTruncStoreAction(VT, StoreVT, Expand);
}
}
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=78595&r1=78594&r2=78595&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Aug 10 15:46:15 2009
@@ -742,22 +742,23 @@
// Promote v16i8, v8i16, v4i32 load, select, and, or, xor to v2i64.
for (unsigned i = (unsigned)MVT::v16i8; i != (unsigned)MVT::v2i64; i++) {
- MVT VT = (MVT::SimpleValueType)i;
+ MVT::SimpleValueType SVT = (MVT::SimpleValueType)i;
+ MVT VT = SVT;
// Do not attempt to promote non-128-bit vectors
if (!VT.is128BitVector()) {
continue;
}
- setOperationAction(ISD::AND, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::AND, VT, MVT::v2i64);
- setOperationAction(ISD::OR, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::OR, VT, MVT::v2i64);
- setOperationAction(ISD::XOR, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::XOR, VT, MVT::v2i64);
- setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::LOAD, VT, MVT::v2i64);
- setOperationAction(ISD::SELECT, VT.getSimpleVT(), Promote);
- AddPromotedToType (ISD::SELECT, VT, MVT::v2i64);
+ setOperationAction(ISD::AND, SVT, Promote);
+ AddPromotedToType (ISD::AND, SVT, MVT::v2i64);
+ setOperationAction(ISD::OR, SVT, Promote);
+ AddPromotedToType (ISD::OR, SVT, MVT::v2i64);
+ setOperationAction(ISD::XOR, SVT, Promote);
+ AddPromotedToType (ISD::XOR, SVT, MVT::v2i64);
+ setOperationAction(ISD::LOAD, SVT, Promote);
+ AddPromotedToType (ISD::LOAD, SVT, MVT::v2i64);
+ setOperationAction(ISD::SELECT, SVT, Promote);
+ AddPromotedToType (ISD::SELECT, SVT, MVT::v2i64);
}
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
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