[llvm-commits] [llvm] r78126 - in /llvm/trunk: lib/Target/ARM/ARMInstrFormats.td lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/load-global.ll test/CodeGen/Thumb2/pic-load.ll

[Evan Cheng]

Author: evancheng
Date: Tue Aug  4 18:47:55 2009
New Revision: 78126

URL: http://llvm.org/viewvc/llvm-project?rev=78126&view=rev
Log:
Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/test/CodeGen/Thumb2/load-global.ll
    llvm/trunk/test/CodeGen/Thumb2/pic-load.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=78126&r1=78125&r2=78126&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Aug  4 18:47:55 2009
@@ -808,6 +808,10 @@
 class TI<dag oops, dag iops, string asm, list<dag> pattern>
   : ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "", pattern>;
 
+// Two-address instructions
+class TIt<dag oops, dag iops, string asm, list<dag> pattern>
+  : ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "$lhs = $dst", pattern>;
+
 // tBL, tBX instructions
 class TIx2<dag oops, dag iops, string asm, list<dag> pattern>
   : ThumbI<oops, iops, AddrModeNone, Size4Bytes, asm, "", pattern>;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=78126&r1=78125&r2=78126&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Tue Aug  4 18:47:55 2009
@@ -127,10 +127,11 @@
            [(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb1Only]>;
 }
 
+// For both thumb1 and thumb2.
 let isNotDuplicable = 1 in
-def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp),
-                  "$cp:\n\tadd $dst, pc",
-                  [(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>;
+def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp),
+                 "$cp:\n\tadd $dst, pc",
+                 [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
 
 // PC relative add.
 def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs),

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=78126&r1=78125&r2=78126&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Aug  4 18:47:55 2009
@@ -422,12 +422,6 @@
 //  Miscellaneous Instructions.
 //
 
-let isNotDuplicable = 1 in
-def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp),
-                    "$cp:\n\tadd.w $dst, $lhs, pc",
-                    [(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
-
-
 // LEApcrel - Load a pc-relative address into a register without offending the
 // assembler.
 def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p),

Modified: llvm/trunk/test/CodeGen/Thumb2/load-global.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/load-global.ll?rev=78126&r1=78125&r2=78126&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/load-global.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/load-global.ll Tue Aug  4 18:47:55 2009
@@ -17,7 +17,7 @@
 ; DYNAMIC: .long L_G$non_lazy_ptr
 
 ; PIC: _test1
-; PIC: add.w r0, r0, pc
+; PIC: add r0, pc
 ; PIC: .long L_G$non_lazy_ptr-(LPC0+4)
 
 ; LINUX: test1

Modified: llvm/trunk/test/CodeGen/Thumb2/pic-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/pic-load.ll?rev=78126&r1=78125&r2=78126&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/pic-load.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/pic-load.ll Tue Aug  4 18:47:55 2009
@@ -8,7 +8,7 @@
 define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
 entry:
 ; CHECK: atexit:
-; CHECK: add.w r0, r0, pc
+; CHECK: add r0, pc
 	%r = alloca %struct.one_atexit_routine, align 4		; <%struct.one_atexit_routine*> [#uses=3]
 	%0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0		; <void ()**> [#uses=1]
 	store void ()* %func, void ()** %0, align 4