[llvm-commits] [llvm] r77940 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrMMX.td test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll test/CodeGen/X86/mmx-bitcast-to-i64.ll

[Rafael Espindola]

Author: rafael
Date: Sun Aug  2 21:45:34 2009
New Revision: 77940

URL: http://llvm.org/viewvc/llvm-project?rev=77940&view=rev
Log:
Use movq to move 64 bits in and out of mmx registers.
Fixes PR4669


Added:
    llvm/trunk/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86InstrMMX.td
    llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=77940&r1=77939&r2=77940&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Aug  2 21:45:34 2009
@@ -4447,6 +4447,11 @@
                                    DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i32,
                                                Op.getOperand(0))));
 
+  if (Op.getValueType() == MVT::v1i64 && Op.getOperand(0).getValueType() == MVT::i64)
+    return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v1i64,
+                       DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v1i64,
+                                   Op.getOperand(0)));
+
   SDValue AnyExt = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Op.getOperand(0));
   MVT VT = MVT::v2i32;
   switch (Op.getValueType().getSimpleVT()) {

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=77940&r1=77939&r2=77940&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Sun Aug  2 21:45:34 2009
@@ -163,10 +163,14 @@
                              "movd\t{$src, $dst|$dst, $src}",
                              []>;
 
-let neverHasSideEffects = 1 in
-def MMX_MOVD64from64rr : MMXRI<0x7E, MRMDestReg,
+let neverHasSideEffects = 1 in {
+def MMX_MOVD64from64rr : MMXRI<0x7F, MRMDestReg,
                                (outs GR64:$dst), (ins VR64:$src),
-                               "movd\t{$src, $dst|$dst, $src}", []>;
+                               "movq\t{$src, $dst|$dst, $src}", []>;
+def MMX_MOVD64rrv164 : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src),
+                            "movq\t{$src, $dst|$dst, $src}",
+                            [(set VR64:$dst, (v1i64 (scalar_to_vector GR64:$src)))]>;
+}
 
 let neverHasSideEffects = 1 in
 def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src),

Added: llvm/trunk/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll?rev=77940&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-08-02-mmx-scalar-to-vector.ll Sun Aug  2 21:45:34 2009
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=x86-64
+; PR4669
+declare <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64>, i32)
+
+define <1 x i64> @test(i64 %t) {
+entry:
+	%t1 = insertelement <1 x i64> undef, i64 %t, i32 0
+	%t2 = tail call <1 x i64> @llvm.x86.mmx.pslli.q(<1 x i64> %t1, i32 48)
+	ret <1 x i64> %t2
+}

Modified: llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll?rev=77940&r1=77939&r2=77940&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-bitcast-to-i64.ll Sun Aug  2 21:45:34 2009
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movd | count 4
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 8
 
 define i64 @foo(<1 x i64>* %p) {
   %t = load <1 x i64>* %p