[llvm-commits] [llvm] r77898 - in /llvm/trunk: CMakeLists.txt autoconf/configure.ac configure
Jakob Stoklund Olesen
stoklund at 2pi.dk
Sun Aug 2 10:32:37 PDT 2009
Author: stoklund
Date: Sun Aug 2 12:32:37 2009
New Revision: 77898
URL: http://llvm.org/viewvc/llvm-project?rev=77898&view=rev
Log:
Build Blackfin target with autoconf and cmake.
Note that configure was edited by hand. Will somebody with the correct version of autoconf please regenerate?
Modified:
llvm/trunk/CMakeLists.txt
llvm/trunk/autoconf/configure.ac
llvm/trunk/configure
Modified: llvm/trunk/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/CMakeLists.txt?rev=77898&r1=77897&r2=77898&view=diff
==============================================================================
--- llvm/trunk/CMakeLists.txt (original)
+++ llvm/trunk/CMakeLists.txt Sun Aug 2 12:32:37 2009
@@ -49,6 +49,7 @@
set(LLVM_ALL_TARGETS
Alpha
ARM
+ Blackfin
CBackend
CellSPU
CppBackend
Modified: llvm/trunk/autoconf/configure.ac
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/autoconf/configure.ac?rev=77898&r1=77897&r2=77898&view=diff
==============================================================================
--- llvm/trunk/autoconf/configure.ac (original)
+++ llvm/trunk/autoconf/configure.ac Sun Aug 2 12:32:37 2009
@@ -227,6 +227,7 @@
xcore-*) llvm_cv_target_arch="XCore" ;;
msp430-*) llvm_cv_target_arch="MSP430" ;;
s390x-*) llvm_cv_target_arch="SystemZ" ;;
+ bfin-*) llvm_cv_target_arch="Blackfin" ;;
*) llvm_cv_target_arch="Unknown" ;;
esac])
@@ -341,18 +342,19 @@
AC_SUBST(JIT,[[]])
else
case "$llvm_cv_target_arch" in
- x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
- Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
- PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
- x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
- Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
- ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
- Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
- PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
- XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
- MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
- SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
- *) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ x86) AC_SUBST(TARGET_HAS_JIT,1) ;;
+ Sparc) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ PowerPC) AC_SUBST(TARGET_HAS_JIT,1) ;;
+ x86_64) AC_SUBST(TARGET_HAS_JIT,1) ;;
+ Alpha) AC_SUBST(TARGET_HAS_JIT,1) ;;
+ ARM) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ Mips) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ XCore) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ MSP430) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ SystemZ) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ Blackfin) AC_SUBST(TARGET_HAS_JIT,0) ;;
+ *) AC_SUBST(TARGET_HAS_JIT,0) ;;
esac
fi
@@ -401,41 +403,43 @@
[Build specific host targets: all,host-only,{target-name} (default=all)]),,
enableval=all)
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
host-only)
case "$llvm_cv_target_arch" in
- x86) TARGETS_TO_BUILD="X86" ;;
- x86_64) TARGETS_TO_BUILD="X86" ;;
- Sparc) TARGETS_TO_BUILD="Sparc" ;;
- PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
- Alpha) TARGETS_TO_BUILD="Alpha" ;;
- ARM) TARGETS_TO_BUILD="ARM" ;;
- Mips) TARGETS_TO_BUILD="Mips" ;;
+ x86) TARGETS_TO_BUILD="X86" ;;
+ x86_64) TARGETS_TO_BUILD="X86" ;;
+ Sparc) TARGETS_TO_BUILD="Sparc" ;;
+ PowerPC) TARGETS_TO_BUILD="PowerPC" ;;
+ Alpha) TARGETS_TO_BUILD="Alpha" ;;
+ ARM) TARGETS_TO_BUILD="ARM" ;;
+ Mips) TARGETS_TO_BUILD="Mips" ;;
CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;;
- PIC16) TARGETS_TO_BUILD="PIC16" ;;
- XCore) TARGETS_TO_BUILD="XCore" ;;
- MSP430) TARGETS_TO_BUILD="MSP430" ;;
- SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
+ PIC16) TARGETS_TO_BUILD="PIC16" ;;
+ XCore) TARGETS_TO_BUILD="XCore" ;;
+ MSP430) TARGETS_TO_BUILD="MSP430" ;;
+ SystemZ) TARGETS_TO_BUILD="SystemZ" ;;
+ Blackfin) TARGETS_TO_BUILD="Blackfin" ;;
*) AC_MSG_ERROR([Can not set target to build]) ;;
esac
;;
*)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do
case "$a_target" in
- x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
- x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
- sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
- powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
- alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
- arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
- mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
- spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
- pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
- xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
- msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
- systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
- cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
- msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
- cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
+ x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
+ x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
+ sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;;
+ powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;;
+ alpha) TARGETS_TO_BUILD="Alpha $TARGETS_TO_BUILD" ;;
+ arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;;
+ mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;;
+ spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;;
+ pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;;
+ xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
+ msp430) TARGETS_TO_BUILD="MSP430 $TARGETS_TO_BUILD" ;;
+ systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
+ blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;;
+ cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;;
+ msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;;
+ cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;;
*) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
esac
done
Modified: llvm/trunk/configure
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/configure?rev=77898&r1=77897&r2=77898&view=diff
==============================================================================
--- llvm/trunk/configure (original)
+++ llvm/trunk/configure Sun Aug 2 12:32:37 2009
@@ -4935,7 +4935,7 @@
fi
case "$enableval" in
- all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ CBackend MSIL CppBackend" ;;
+ all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend" ;;
host-only)
case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86" ;;
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