[llvm-commits] [llvm] r77340 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-lsr3.ll

David Goodwin david_goodwin at apple.com
Tue Jul 28 13:57:08 PDT 2009


We (Apple) should have the assembler fixed soon and then I'll revert  
the workaround. gas should accept the current form as well so it  
shouldn't be a problem.

David

On Jul 28, 2009, at 1:45 PM, Sandeep Patel wrote:

> Could this be conditionalized for Darwin? gas seems to work for  
> these cases.
>
> deep
>
> On Tue, Jul 28, 2009 at 8:28 PM, Bob Wilson<bob.wilson at apple.com>  
> wrote:
>> Apple's assembler doesn't recognize Thumb2 RRX instructions, e.g.,
>> "rrx r0,r0".
>>
>> On Jul 28, 2009, at 1:22 PM, Sandeep Patel wrote:
>>
>>> For those without internal Radar access, could you elaborate?
>>>
>>> deep
>>>
>>> On Tue, Jul 28, 2009 at 6:15 PM, David
>>> Goodwin<david_goodwin at apple.com> wrote:
>>>> Author: david_goodwin
>>>> Date: Tue Jul 28 13:15:38 2009
>>>> New Revision: 77340
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=77340&view=rev
>>>> Log:
>>>> Add workaround for <rdar://problem/7098328>.
>>>>
>>>> Modified:
>>>>    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>>>>    llvm/trunk/test/CodeGen/Thumb2/thumb2-lsr3.ll
>>>>
>>>> Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=77340&r1=77339&r2=77340&view=diff
>>>>
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> = 
>>>> = 
>>>> ===================================================================
>>>> --- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
>>>> +++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Tue Jul 28 13:15:38
>>>> 2009
>>>> @@ -714,8 +714,9 @@
>>>>  defm t2ASR  : T2I_sh_ir<"asr", BinOpFrag<(sra  node:$LHS, node:
>>>> $RHS)>>;
>>>>  defm t2ROR  : T2I_sh_ir<"ror", BinOpFrag<(rotr node:$LHS, node:
>>>> $RHS)>>;
>>>>
>>>> +// FIXME should be "rrx $dst,$src" once <rdar://problem/7098328>
>>>> is fixed
>>>>  def t2MOVrx : T2sI<(outs GPR:$dst), (ins GPR:$src),
>>>> -                   "rrx", " $dst, $src",
>>>> +                   "mov", ".w $dst, $src, rrx",
>>>>                    [(set GPR:$dst, (ARMrrx GPR:$src))]>;
>>>>
>>>>  let Defs = [CPSR] in {
>>>>
>>>> Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-lsr3.ll
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-lsr3.ll?rev=77340&r1=77339&r2=77340&view=diff
>>>>
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> = 
>>>> = 
>>>> ===================================================================
>>>> --- llvm/trunk/test/CodeGen/Thumb2/thumb2-lsr3.ll (original)
>>>> +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-lsr3.ll Tue Jul 28
>>>> 13:15:38 2009
>>>> @@ -2,7 +2,7 @@
>>>>
>>>>  define i1 @test1(i64 %poscnt, i32 %work) {
>>>>  entry:
>>>> -; CHECK: rrx r0, r0
>>>> +; CHECK: mov.w r0, r0, rrx
>>>>  ; CHECK: lsrs.w r1, r1, #1
>>>>        %0 = lshr i64 %poscnt, 1
>>>>        %1 = icmp eq i64 %0, 0
>>>> @@ -11,7 +11,7 @@
>>>>
>>>>  define i1 @test2(i64 %poscnt, i32 %work) {
>>>>  entry:
>>>> -; CHECK: rrx r0, r0
>>>> +; CHECK: mov.w r0, r0, rrx
>>>>  ; CHECK: asrs.w r1, r1, #1
>>>>        %0 = ashr i64 %poscnt, 1
>>>>        %1 = icmp eq i64 %0, 0
>>>>
>>>>
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