[llvm-commits] [llvm] r77041 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

[Evan Cheng]

Author: evancheng
Date: Fri Jul 24 20:55:25 2009
New Revision: 77041

URL: http://llvm.org/viewvc/llvm-project?rev=77041&view=rev
Log:
80 col violation.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=77041&r1=77040&r2=77041&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Fri Jul 24 20:55:25 2009
@@ -959,7 +959,8 @@
     assert(ARM_AM::getSOImmVal(ThisVal) != -1 && "Bit extraction didn't work?");
 
     // Build the new ADD / SUB.
-    BuildMI(MBB, MBBI, dl, TII.get(TII.getOpcode(isSub ? ARMII::SUBri : ARMII::ADDri)), DestReg)
+    unsigned Opc = TII.getOpcode(isSub ? ARMII::SUBri : ARMII::ADDri);
+    BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg)
       .addReg(BaseReg, RegState::Kill).addImm(ThisVal)
       .addImm((unsigned)Pred).addReg(PredReg).addReg(0);
     BaseReg = DestReg;