[llvm-commits] [llvm] r76936 - in /llvm/trunk/lib/Target/Mips: MipsISelLowering.cpp MipsISelLowering.h MipsSubtarget.cpp MipsSubtarget.h
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Fri Jul 24 12:40:41 PDT 2009
On Fri, Jul 24, 2009 at 1:32 PM, Chris Lattner<clattner at apple.com> wrote:
>
> On Jul 24, 2009, at 12:36 AM, Bruno Cardoso Lopes wrote:
>
>> Hi Chris,
>>
>> The small section thing on Mips is used to guarantee that the section
>> could be addressed will "gp_rel" relocation, which requires only one
>> instruction
>> and the same is not true for normal data relocations on Mips. How do
>> you suggest
>> that we keep this behaviour? The "-G" switch is used on psp homebrew
>> stuff and I would like to have this functionality if possible.
>
> Ah, this is unfortunate. I didn't know that anyone was actually using
> this, based on the previous exchange. I will pull this back in after
> I get some other stuff rearranged.
>
> Can you check in an xfailed testcase that shows the instruction
> generation of this gprel access? There was nothing in the testsuite
> that showed it.
The smallsection test removed in the other commit already check for the
"gp_rel", but I'll provide a specific test for it when you revert the changes.
Thanks!
> Thanks for the head's up Bruno.
>
> -Chris
>
>>
>> Thanks,
>>
>> On Fri, Jul 24, 2009 at 12:14 AM, Chris Lattner<sabre at nondot.org>
>> wrote:
>>> Author: lattner
>>> Date: Thu Jul 23 22:14:35 2009
>>> New Revision: 76936
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=76936&view=rev
>>> Log:
>>> remove more remnants of small section support.
>>>
>>> Modified:
>>> llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>>> llvm/trunk/lib/Target/Mips/MipsISelLowering.h
>>> llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
>>> llvm/trunk/lib/Target/Mips/MipsSubtarget.h
>>>
>>> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=76936&r1=76935&r2=76936&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =====================================================================
>>> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
>>> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Jul 23
>>> 22:14:35 2009
>>> @@ -216,37 +216,6 @@
>>> return VReg;
>>> }
>>>
>>> -// A address must be loaded from a small section if its size is
>>> less than the
>>> -// small section size threshold. Data in this section must be
>>> addressed using
>>> -// gp_rel operator.
>>> -bool MipsTargetLowering::IsInSmallSection(unsigned Size) {
>>> - return (Size > 0 && (Size <= Subtarget->getSSectionThreshold()));
>>> -}
>>> -
>>> -// Discover if this global address can be placed into small data/
>>> bss section.
>>> -bool MipsTargetLowering::IsGlobalInSmallSection(GlobalValue *GV)
>>> -{
>>> - const TargetData *TD = getTargetData();
>>> - const GlobalVariable *GVA = dyn_cast<GlobalVariable>(GV);
>>> -
>>> - if (!GVA)
>>> - return false;
>>> -
>>> - const Type *Ty = GV->getType()->getElementType();
>>> - unsigned Size = TD->getTypeAllocSize(Ty);
>>> -
>>> - // if this is a internal constant string, there is a special
>>> - // section for it, but not in small data/bss.
>>> - if (GVA->hasInitializer() && GV->hasLocalLinkage()) {
>>> - Constant *C = GVA->getInitializer();
>>> - const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
>>> - if (CVA && CVA->isCString())
>>> - return false;
>>> - }
>>> -
>>> - return IsInSmallSection(Size);
>>> -}
>>> -
>>> // Get fp branch code (not opcode) from condition code.
>>> static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode
>>> CC) {
>>> if (CC >= Mips::FCOND_F && CC <= Mips::FCOND_NGT)
>>> @@ -532,15 +501,8 @@
>>>
>>> if (!Subtarget->hasABICall()) {
>>> SDVTList VTs = DAG.getVTList(MVT::i32);
>>> - SDValue Ops[] = { GA };
>>> - // %gp_rel relocation
>>> - if (!isa<Function>(GV) && IsGlobalInSmallSection(GV)) {
>>> - SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, dl, VTs,
>>> Ops, 1);
>>> - SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(MVT::i32);
>>> - return DAG.getNode(ISD::ADD, dl, MVT::i32, GOT, GPRelNode);
>>> - }
>>> // %hi/%lo relocation
>>> - SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, VTs, Ops, 1);
>>> + SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, VTs, &GA, 1);
>>> SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GA);
>>> return DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo);
>>>
>>>
>>> Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.h?rev=76936&r1=76935&r2=76936&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =====================================================================
>>> --- llvm/trunk/lib/Target/Mips/MipsISelLowering.h (original)
>>> +++ llvm/trunk/lib/Target/Mips/MipsISelLowering.h Thu Jul 23
>>> 22:14:35 2009
>>> @@ -91,8 +91,6 @@
>>> // Lower Operand helpers
>>> SDNode *LowerCallResult(SDValue Chain, SDValue InFlag,
>>> CallSDNode *TheCall,
>>> unsigned CallingConv, SelectionDAG &DAG);
>>> - bool IsGlobalInSmallSection(GlobalValue *GV);
>>> - bool IsInSmallSection(unsigned Size);
>>>
>>> // Lower Operand specifics
>>> SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG);
>>>
>>> Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=76936&r1=76935&r2=76936&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =====================================================================
>>> --- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
>>> +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Thu Jul 23
>>> 22:14:35 2009
>>> @@ -24,10 +24,6 @@
>>> static cl::opt<bool>
>>> AbsoluteCall("enable-mips-absolute-call", cl::Hidden,
>>> cl::desc("Enable absolute call within abicall"));
>>> -static cl::opt<unsigned>
>>> -SSThreshold("mips-ssection-threshold", cl::Hidden,
>>> - cl::desc("Small data and bss section threshold size
>>> (default=8)"),
>>> - cl::init(8));
>>>
>>> MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module
>>> &M,
>>> const std::string &FS, bool little) :
>>> @@ -43,9 +39,6 @@
>>> ParseSubtargetFeatures(FS, CPU);
>>> const std::string& TT = M.getTargetTriple();
>>>
>>> - // Small section size threshold
>>> - SSectionThreshold = SSThreshold;
>>> -
>>> // Is the target system Linux ?
>>> if (TT.find("linux") == std::string::npos)
>>> IsLinux = false;
>>>
>>> Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=76936&r1=76935&r2=76936&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =====================================================================
>>> --- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
>>> +++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Thu Jul 23 22:14:35
>>> 2009
>>> @@ -68,10 +68,6 @@
>>> // isLinux - Target system is Linux. Is false we consider ELFOS
>>> for now.
>>> bool IsLinux;
>>>
>>> - // Put global and static items less than or equal to
>>> SSectionThreshold
>>> - // bytes into the small data or bss section. The default is 8.
>>> - unsigned SSectionThreshold;
>>> -
>>> /// Features related to the presence of specific instructions.
>>>
>>> // HasSEInReg - SEB and SEH (signext in register) instructions.
>>> @@ -124,7 +120,6 @@
>>> bool hasABICall() const { return HasABICall; };
>>> bool hasAbsoluteCall() const { return HasAbsoluteCall; };
>>> bool isLinux() const { return IsLinux; };
>>> - unsigned getSSectionThreshold() const { return
>>> SSectionThreshold; }
>>>
>>> /// Features related to the presence of specific instructions.
>>> bool hasSEInReg() const { return HasSEInReg; };
>>>
>>>
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>>
>>
>>
>> --
>> Bruno Cardoso Lopes
>> http://www.brunocardoso.cc
>>
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>
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--
Bruno Cardoso Lopes
http://www.brunocardoso.cc
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