[llvm-commits] [llvm] r76100 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/VirtRegRewriter.cpp test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll

[Evan Cheng]

Author: evancheng
Date: Thu Jul 16 15:15:00 2009
New Revision: 76100

URL: http://llvm.org/viewvc/llvm-project?rev=76100&view=rev
Log:
Changed my mind. We now allow remat of instructions whose defs have subreg indices.

Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
    llvm/trunk/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=76100&r1=76099&r2=76100&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Jul 16 15:15:00 2009
@@ -1157,11 +1157,6 @@
   if (DisableReMat)
     return false;
 
-  // FIXME: For now, avoid remating instructions whose definition has a subreg
-  // index. It's just incredibly difficult to get right.
-  if (MI->findRegisterDefOperand(li.reg)->getSubReg())
-    return false;
-
   if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
     return true;
 

Modified: llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp?rev=76100&r1=76099&r2=76100&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegRewriter.cpp Thu Jul 16 15:15:00 2009
@@ -490,7 +490,14 @@
                           const TargetInstrInfo *TII,
                           const TargetRegisterInfo *TRI,
                           VirtRegMap &VRM) {
-  TII->reMaterialize(MBB, MII, DestReg, 0, VRM.getReMaterializedMI(Reg));
+  MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
+#ifdef NDEBUG
+  const TargetInstrDesc &TID = ReMatDefMI->getDesc();
+  assert(TID.getNumDefs() != 1 &&
+         "Don't know how to remat instructions that define > 1 values!");
+#endif
+  TII->reMaterialize(MBB, MII, DestReg,
+                     ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI);
   MachineInstr *NewMI = prior(MII);
   for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = NewMI->getOperand(i);

Modified: llvm/trunk/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll?rev=76100&r1=76099&r2=76100&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-08-23-X86-64AsmBug.ll Thu Jul 16 15:15:00 2009
@@ -1,10 +1,7 @@
+; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
 ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movq
 ; PR2677
 
-; FIXME: llvm-as < %s | llc -mtriple=x86_64-apple-darwin | grep movd | count 1
-; We now no longer allow instruction whose def has a sub-reg index to be
-; rematerialized.
-
 
 	%struct.Bigint = type { %struct.Bigint*, i32, i32, i32, i32, [1 x i32] }