[llvm-commits] [llvm] r76044 - in /llvm/trunk/lib/Target/SystemZ: SystemZISelLowering.cpp SystemZInstrInfo.td SystemZRegisterInfo.td

Anton Korobeynikov asl at math.spbu.ru
Thu Jul 16 07:27:55 PDT 2009


Author: asl
Date: Thu Jul 16 09:27:53 2009
New Revision: 76044

URL: http://llvm.org/viewvc/llvm-project?rev=76044&view=rev
Log:
Out GR128 regclass is not a 'real' i128 one.

Modified:
    llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
    llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td

Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=76044&r1=76043&r2=76044&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Jul 16 09:27:53 2009
@@ -45,7 +45,6 @@
   addRegisterClass(MVT::i32,  SystemZ::GR32RegisterClass);
   addRegisterClass(MVT::i64,  SystemZ::GR64RegisterClass);
   addRegisterClass(MVT::v2i32,SystemZ::GR64PRegisterClass);
-  addRegisterClass(MVT::i128, SystemZ::GR128RegisterClass);
   addRegisterClass(MVT::v2i64,SystemZ::GR128RegisterClass);
 
   if (!UseSoftFloat) {

Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=76044&r1=76043&r2=76044&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Thu Jul 16 09:27:53 2009
@@ -810,18 +810,18 @@
 
 // muls
 def : Pat<(mulhs GR32:$src1, GR32:$src2),
-          (EXTRACT_SUBREG (MUL64rrP (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
+          (EXTRACT_SUBREG (MUL64rrP (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)),
                                                    GR32:$src1, subreg_odd32),
                                     GR32:$src2),
                           subreg_even32)>;
 
 def : Pat<(mulhu GR32:$src1, GR32:$src2),
-          (EXTRACT_SUBREG (UMUL64rrP (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
+          (EXTRACT_SUBREG (UMUL64rrP (INSERT_SUBREG (v2i32 (IMPLICIT_DEF)),
                                                     GR32:$src1, subreg_odd32),
                                      GR32:$src2),
                           subreg_even32)>;
 def : Pat<(mulhu GR64:$src1, GR64:$src2),
-          (EXTRACT_SUBREG (UMUL128rrP (INSERT_SUBREG (i128 (IMPLICIT_DEF)),
+          (EXTRACT_SUBREG (UMUL128rrP (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
                                                      GR64:$src1, subreg_odd),
                                       GR64:$src2),
                           subreg_even)>;

Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td?rev=76044&r1=76043&r2=76044&view=diff

==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.td Thu Jul 16 09:27:53 2009
@@ -399,7 +399,7 @@
   }];
 }
 
-def GR128 : RegisterClass<"SystemZ", [i128, v2i64], 128,
+def GR128 : RegisterClass<"SystemZ", [v2i64], 128,
   [R0Q, R2Q, R4Q, R6Q, R8Q, R10Q, R12Q, R14Q]>
 {
   let SubRegClassList = [GR32, GR32, GR64, GR64];





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