[llvm-commits] [llvm] r75789 - /llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

[David Goodwin]

Author: david_goodwin
Date: Wed Jul 15 10:50:19 2009
New Revision: 75789

URL: http://llvm.org/viewvc/llvm-project?rev=75789&view=rev
Log:
Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg].

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=75789&r1=75788&r2=75789&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Wed Jul 15 10:50:19 2009
@@ -613,23 +613,21 @@
 
 bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue Op, SDValue N,
                                            SDValue &Base, SDValue &OffImm) {
-  if (N.getOpcode() == ISD::ADD) {
+  if ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::SUB)) {
     if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-      int RHSC = (int)RHS->getZExtValue();
-      if (RHSC < 0 && RHSC > -0x100) { // 8 bits.
+      int RHSC = (int)RHS->getSExtValue();
+      if (N.getOpcode() == ISD::SUB)
+        RHSC = -RHSC;
+
+      if ((RHSC >= -255) && (RHSC <= 255)) { // sign + 8 bits.
         Base   = N.getOperand(0);
         OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
         return true;
       }
-    }
-  } else if (N.getOpcode() == ISD::SUB) {
-    if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-      int RHSC = (int)RHS->getZExtValue();
-      if (RHSC >= 0 && RHSC < 0x100) { // 8 bits.
-        Base   = N.getOperand(0);
-        OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32);
-        return true;
-      }
+    } else if (N.getOpcode() == ISD::SUB) {
+      Base   = N;
+      OffImm = CurDAG->getTargetConstant(0, MVT::i32);
+      return true;
     }
   }
 
@@ -700,6 +698,10 @@
     return true;
   }
 
+  // Thumb2 does not support (R - R) or (R - (R << [1,2,3])).
+  if (N.getOpcode() != ISD::ADD)
+    return false;
+
   // Look for (R + R) or (R + (R << [1,2,3])).
   unsigned ShAmt = 0;
   Base   = N.getOperand(0);
@@ -727,9 +729,10 @@
       ShOpcVal = ARM_AM::no_shift;
     }
   } else if (SelectT2AddrModeImm12(Op, N, Base, ShImm) ||
-             SelectT2AddrModeImm8 (Op, N, Base, ShImm))
+             SelectT2AddrModeImm8 (Op, N, Base, ShImm)) {
     // Don't match if it's possible to match to one of the r +/- imm cases.
     return false;
+  }
   
   ShImm = CurDAG->getTargetConstant(ShAmt, MVT::i32);