[llvm-commits] [llvm] r75576 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/CodeGen/Thumb2/thumb2-bfc.ll

[David Goodwin]

Author: david_goodwin
Date: Mon Jul 13 19:57:56 2009
New Revision: 75576

URL: http://llvm.org/viewvc/llvm-project?rev=75576&view=rev
Log:
Fix detection of valid BFC immediates.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/test/CodeGen/Thumb2/thumb2-bfc.ll

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=75576&r1=75575&r2=75576&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Jul 13 19:57:56 2009
@@ -168,16 +168,16 @@
   uint32_t v = (uint32_t)N->getZExtValue();
   if (v == 0xffffffff)
     return 0;
-  // naive checker. should do better, but simple is best for now since it's
-  // more likely to be correct.
-  while (v & 1) v >>= 1;    // shift off the leading 1's
-  if (v)
-    {
-      while (!(v & 1)) v >>=1;  // shift off the mask
-      while (v & 1) v >>= 1;    // shift off the trailing 1's
-    }
-  // if this is a mask for clearing a bitfield, what's left should be zero.
-  return (v == 0);
+  // there can be 1's on either or both "outsides", all the "inside"
+  // bits must be 0's
+  unsigned int lsb = 0, msb = 31;
+  while (v & (1 << msb)) --msb;
+  while (v & (1 << lsb)) ++lsb;
+  for (unsigned int i = lsb; i <= msb; ++i) {
+    if (v & (1 << i))
+      return 0;
+  }
+  return 1;
 }] > {
   let PrintMethod = "printBitfieldInvMaskImmOperand";
 }

Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-bfc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-bfc.ll?rev=75576&r1=75575&r2=75576&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/thumb2-bfc.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/thumb2-bfc.ll Mon Jul 13 19:57:56 2009
@@ -17,3 +17,9 @@
     %tmp = and i32 %a, 4095
     ret i32 %tmp
 }
+
+; 2147483646 = 0x7ffffffe   not implementable w/ BFC
+define i32 @f4(i32 %a) {
+    %tmp = and i32 %a, 2147483646
+    ret i32 %tmp
+}