[llvm-commits] [llvm] r73818 - in /llvm/trunk/lib/Target/X86/AsmPrinter: X86ATTAsmPrinter.cpp X86ATTInstPrinter.cpp
Chris Lattner
sabre at nondot.org
Sat Jun 20 00:59:11 PDT 2009
Author: lattner
Date: Sat Jun 20 02:59:10 2009
New Revision: 73818
URL: http://llvm.org/viewvc/llvm-project?rev=73818&view=rev
Log:
some comments and cleanup
Modified:
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=73818&r1=73817&r2=73818&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Sat Jun 20 02:59:10 2009
@@ -818,9 +818,17 @@
TmpInst.addOperand(MCOp);
}
- if (TmpInst.getOpcode() == X86::LEA64_32r) {
- // Should handle the 'subreg rewriting' for the lea64_32mem operand.
+ switch (TmpInst.getOpcode()) {
+ case X86::LEA64_32r:
+ // Handle the 'subreg rewriting' for the lea64_32mem operand.
lower_lea64_32mem(&TmpInst, 1);
+ break;
+ case X86::CALL64pcrel32:
+ case X86::CALLpcrel32:
+ case X86::TAILJMPd:
+ // The target operand is pc-relative, not an absolute reference.
+ // FIXME: this should be an operand property, not an asm format modifier.
+ ;
}
// FIXME: Convert TmpInst.
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp?rev=73818&r1=73817&r2=73818&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp Sat Jun 20 02:59:10 2009
@@ -348,7 +348,6 @@
}
void X86ATTAsmPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
- const char *Modifier = 0;
bool NotRIPRel = false;
const MCOperand &BaseReg = MI->getOperand(Op);
@@ -368,28 +367,20 @@
}
if (IndexReg.getReg() || BaseReg.getReg()) {
- unsigned ScaleVal = MI->getOperand(Op+1).getImm();
- unsigned BaseRegOperand = 0, IndexRegOperand = 2;
-
// There are cases where we can end up with ESP/RSP in the indexreg slot.
// If this happens, swap the base/index register to support assemblers that
// don't work when the index is *SP.
// FIXME: REMOVE THIS.
- if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
- assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
- abort();
- //std::swap(BaseReg, IndexReg);
- //std::swap(BaseRegOperand, IndexRegOperand);
- }
+ assert(IndexReg.getReg() != X86::ESP && IndexReg.getReg() != X86::RSP);
O << '(';
if (BaseReg.getReg())
- printOperand(MI, Op+BaseRegOperand, Modifier);
+ printOperand(MI, Op);
if (IndexReg.getReg()) {
O << ',';
- printOperand(MI, Op+IndexRegOperand, Modifier);
- if (ScaleVal != 1)
+ printOperand(MI, Op+2);
+ if (MI->getOperand(Op+1).getImm() != 1)
O << ',' << ScaleVal;
}
O << ')';
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