[llvm-commits] [llvm] r73759 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Evan Cheng]

Author: evancheng
Date: Fri Jun 19 01:56:26 2009
New Revision: 73759

URL: http://llvm.org/viewvc/llvm-project?rev=73759&view=rev
Log:
Should be using Bcc (average) latency to determine if-conversion threshold, not BL.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=73759&r1=73758&r2=73759&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri Jun 19 01:56:26 2009
@@ -296,7 +296,7 @@
     // Use branch latency information to determine if-conversion limits.
     const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
     const InstrItineraryData &InstrItins = Subtarget->getInstrItineraryData();
-    unsigned Latency = InstrItins.getLatency(TII->get(ARM::BL).getSchedClass());
+    unsigned Latency= InstrItins.getLatency(TII->get(ARM::Bcc).getSchedClass());
     if (Latency > 1) {
       setIfCvtBlockSizeLimit(Latency-1);
       if (Latency > 2)