[llvm-commits] [llvm] r72337 - in /llvm/trunk/lib/Target/ARM: ARM.td ARMSubtarget.cpp ARMSubtarget.h

[Anton Korobeynikov]

Author: asl
Date: Sat May 23 14:51:43 2009
New Revision: 72337

URL: http://llvm.org/viewvc/llvm-project?rev=72337&view=rev
Log:
Add ARMv7 architecture, Cortex processors and different FPU modes handling.

Modified:
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
    llvm/trunk/lib/Target/ARM/ARMSubtarget.h

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=72337&r1=72336&r2=72337&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Sat May 23 14:51:43 2009
@@ -28,8 +28,14 @@
                                    "ARM v5TE, v5TEj, v5TExp">;
 def ArchV6      : SubtargetFeature<"v6", "ARMArchVersion", "V6",
                                    "ARM v6">;
-def FeatureVFP2 : SubtargetFeature<"vfp2", "HasVFP2", "true",
+def ArchV7A     : SubtargetFeature<"v7a", "ARMArchVersion", "V7A",
+                                   "ARM v7A">;
+def FeatureVFP2 : SubtargetFeature<"vfp2", "ARMFPUType", "VFPv2",
                                    "Enable VFP2 instructions ">;
+def FeatureVFP3 : SubtargetFeature<"vfp3", "ARMFPUType", "VFPv3",
+                                   "Enable VFP3 instructions ">;
+def FeatureNEON : SubtargetFeature<"neon", "ARMFPUType", "NEON",
+                                   "Enable NEON instructions ">;
 
 //===----------------------------------------------------------------------===//
 // ARM Processors supported.
@@ -84,6 +90,9 @@
 def : Proc<"mpcorenovfp",     [ArchV6]>;
 def : Proc<"mpcore",          [ArchV6, FeatureVFP2]>;
 
+def : Proc<"cortex-a8",       [ArchV7A, FeatureNEON]>;
+def : Proc<"cortex-a9",       [ArchV7A, FeatureNEON]>;
+
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=72337&r1=72336&r2=72337&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Sat May 23 14:51:43 2009
@@ -18,7 +18,7 @@
 
 ARMSubtarget::ARMSubtarget(const Module &M, const std::string &FS, bool thumb)
   : ARMArchVersion(V4T)
-  , HasVFP2(false)
+  , ARMFPUType(None)
   , IsThumb(thumb)
   , UseThumbBacktraces(false)
   , IsR9Reserved(false)

Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=72337&r1=72336&r2=72337&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Sat May 23 14:51:43 2009
@@ -23,16 +23,19 @@
 class ARMSubtarget : public TargetSubtarget {
 protected:
   enum ARMArchEnum {
-    V4T, V5T, V5TE, V6
+    V4T, V5T, V5TE, V6, V7A
   };
 
-  /// ARMArchVersion - ARM architecture vecrsion: V4T (base), V5T, V5TE,
-  /// and V6.
+  enum ARMFPEnum {
+    None, VFPv2, VFPv3, NEON
+  };
+
+  /// ARMArchVersion - ARM architecture version: V4T (base), V5T, V5TE,
+  /// V6, V7A.
   ARMArchEnum ARMArchVersion;
 
-  /// HasVFP2 - True if the processor supports Vector Floating Point (VFP) V2
-  /// instructions.
-  bool HasVFP2;
+  /// ARMFPUType - Floating Point Unit type.
+  ARMFPEnum ARMFPUType;
 
   /// IsThumb - True if we are in thumb mode, false if in ARM mode.
   bool IsThumb;
@@ -72,17 +75,20 @@
     // Change this once Thumb ldmia / stmia support is added.
     return isThumb() ? 0 : 64;
   }
-  /// ParseSubtargetFeatures - Parses features string setting specified 
+  /// ParseSubtargetFeatures - Parses features string setting specified
   /// subtarget options.  Definition of function is auto generated by tblgen.
   std::string ParseSubtargetFeatures(const std::string &FS,
                                      const std::string &CPU);
 
-  bool hasV4TOps()  const { return ARMArchVersion >= V4T; }
-  bool hasV5TOps()  const { return ARMArchVersion >= V5T; }
+  bool hasV4TOps()  const { return ARMArchVersion >= V4T;  }
+  bool hasV5TOps()  const { return ARMArchVersion >= V5T;  }
   bool hasV5TEOps() const { return ARMArchVersion >= V5TE; }
-  bool hasV6Ops()   const { return ARMArchVersion >= V6; }
+  bool hasV6Ops()   const { return ARMArchVersion >= V6;   }
+  bool hasV7Ops()   const { return ARMArchVersion >= V7A;  }
 
-  bool hasVFP2() const { return HasVFP2; }
+  bool hasVFP2() const { return ARMFPUType >= VFPv2; }
+  bool hasVFP3() const { return ARMFPUType >= VFPv3; }
+  bool hasNEON() const { return ARMFPUType >= NEON;  }
 
   bool isTargetDarwin() const { return TargetType == isDarwin; }
   bool isTargetELF() const { return TargetType == isELF; }