[llvm-commits] [llvm] r71975 - in /llvm/trunk: lib/Target/MSP430/MSP430ISelLowering.cpp lib/Target/MSP430/MSP430InstrInfo.td test/CodeGen/MSP430/2009-05-17-Shift.ll

[Anton Korobeynikov]

Author: asl
Date: Sun May 17 05:15:22 2009
New Revision: 71975

URL: http://llvm.org/viewvc/llvm-project?rev=71975&view=rev
Log:
Typo

Added:
    llvm/trunk/test/CodeGen/MSP430/2009-05-17-Shift.ll
Modified:
    llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
    llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td

Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=71975&r1=71974&r2=71975&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Sun May 17 05:15:22 2009
@@ -468,7 +468,7 @@
   }
 
   while (ShiftAmount--)
-    Victim = DAG.getNode((Opc == ISD::SRA ? MSP430ISD::RRA : MSP430ISD::RLA),
+    Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA),
                          dl, VT, Victim);
 
   return Victim;

Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td?rev=71975&r1=71974&r2=71975&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Sun May 17 05:15:22 2009
@@ -624,12 +624,12 @@
                       (implicit SRW)]>;
 
 def SAR8r1c  : Pseudo<(outs GR8:$dst), (ins GR8:$src),
-                      "clrc\n"
+                      "clrc\n\t"
                       "rrc.b\t$dst",
                       [(set GR8:$dst, (MSP430rrc GR8:$src)),
                        (implicit SRW)]>;
 def SAR16r1c : Pseudo<(outs GR16:$dst), (ins GR16:$src),
-                      "clrc\n"
+                      "clrc\n\t"
                       "rrc.w\t$dst",
                       [(set GR16:$dst, (MSP430rrc GR16:$src)),
                        (implicit SRW)]>;

Added: llvm/trunk/test/CodeGen/MSP430/2009-05-17-Shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/2009-05-17-Shift.ll?rev=71975&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/2009-05-17-Shift.ll (added)
+++ llvm/trunk/test/CodeGen/MSP430/2009-05-17-Shift.ll Sun May 17 05:15:22 2009
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=msp430 | grep rra | count 1
+
+define i16 @lsr2u16(i16 %x.arg) nounwind {
+        %retval = alloca i16
+        %x = alloca i16
+        store i16 %x.arg, i16* %x
+        %1 = load i16* %x
+        %2 = lshr i16 %1, 2
+        store i16 %2, i16* %retval
+        br label %return
+return:
+        %3 = load i16* %retval
+        ret i16 %3
+
+}
\ No newline at end of file