[llvm-commits] [llvm] r71537 - in /llvm/trunk/lib/Target/PIC16: PIC16InstrInfo.h PIC16InstrInfo.td PIC16MemSelOpt.cpp

Sanjiv Gupta sanjiv.gupta at microchip.com
Mon May 11 21:30:38 PDT 2009


Author: sgupta
Date: Mon May 11 23:30:38 2009
New Revision: 71537

URL: http://llvm.org/viewvc/llvm-project?rev=71537&view=rev
Log:
Mark mayLoad, mayStore for insns correctly and use them
to check if an insn is accessing memory during mem sel optimization.

Modified:
    llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.h
    llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td
    llvm/trunk/lib/Target/PIC16/PIC16MemSelOpt.cpp

Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.h?rev=71537&r1=71536&r2=71537&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.h (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.h Mon May 11 23:30:38 2009
@@ -64,25 +64,7 @@
                            unsigned &SrcReg, unsigned &DstReg,
                            unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
 
-  static inline bool hasNoMemOperand (const MachineInstr &MI) {
-
-    if (MI.getNumOperands() == 0) return true;
-
-    switch (MI.getOpcode()) {
-    default: return false;  // Beware
-    case PIC16::movlw_lo_1:
-    case PIC16::movlw_hi_1:
-    case PIC16::movlw_lo_2:
-    case PIC16::movlw_hi_2:
-      return true;
-    }
-  }
-       
-   
-    
-
-};
-
+  };
 } // namespace llvm
 
 #endif

Modified: llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td?rev=71537&r1=71536&r2=71537&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16InstrInfo.td Mon May 11 23:30:38 2009
@@ -132,7 +132,7 @@
 //===----------------------------------------------------------------------===//
 
 // W = W Op F : Load the value from F and do Op to W.
-let isTwoAddress = 1 in
+let isTwoAddress = 1, mayLoad = 1 in
 class BinOpFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
   ByteFormat<OpCode, (outs GPR:$dst),
              (ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
@@ -145,6 +145,7 @@
 // This insn class is not marked as TwoAddress because the reg is
 // being used as a source operand only. (Remember a TwoAddress insn
 // needs a copyRegToReg.)
+let mayStore = 1 in
 class BinOpWF<bits<6> OpCode, string OpcStr, SDNode OpNode>:
   ByteFormat<OpCode, (outs),
              (ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
@@ -266,6 +267,7 @@
 
 // Direct store.
 // Input operands are: val = W, ptrlo = GA, offset = offset, ptrhi = banksel.
+let mayStore = 1 in
 class MOVWF_INSN<bits<6> OpCode, SDNode OpNodeDest, SDNode Op>:
   ByteFormat<0, (outs), 
              (ins GPR:$val, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
@@ -297,6 +299,7 @@
 // Direct load.
 // Input Operands are: ptrlo = GA, offset = offset, ptrhi = banksel.
 // Output: dst = W
+let mayLoad = 1 in
 class MOVF_INSN<bits<6> OpCode, SDNode OpNodeSrc, SDNode Op>:
   ByteFormat<0, (outs GPR:$dst), 
              (ins i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
@@ -357,7 +360,7 @@
 }
 
 // W -= [F] ; load from F and sub the value from W.
-let isTwoAddress = 1 in
+let isTwoAddress = 1, mayLoad = 1 in
 class SUBFW<bits<6> OpCode, string OpcStr, SDNode OpNode>:
   ByteFormat<OpCode, (outs GPR:$dst),
              (ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),
@@ -376,6 +379,7 @@
 }
 
 // [F] -= W ; 
+let mayStore = 1 in
 class SUBWF<bits<6> OpCode, string OpcStr, SDNode OpNode>:
   ByteFormat<OpCode, (outs),
              (ins GPR:$src, i8imm:$offset, i8mem:$ptrlo, i8imm:$ptrhi),

Modified: llvm/trunk/lib/Target/PIC16/PIC16MemSelOpt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16MemSelOpt.cpp?rev=71537&r1=71536&r2=71537&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16MemSelOpt.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16MemSelOpt.cpp Mon May 11 23:30:38 2009
@@ -104,9 +104,13 @@
   bool Changed = false;
 
   unsigned NumOperands = MI->getNumOperands();
-  // If this insn has only one operand, probably it is not going to
-  // access any data memory.
-  if (PIC16InstrInfo::hasNoMemOperand(*MI)) return Changed;
+  if (NumOperands == 0) return false;
+
+
+  // If this insn is not going to access any memory, return.
+  const TargetInstrDesc &TID = TII->get(MI->getOpcode());
+  if (! (TID.isCall() || TID.mayLoad() || TID.mayStore()))
+    return false;
 
   // Scan for the memory address operand.
   // FIXME: Should we use standard interfaces like memoperands_iterator,





More information about the llvm-commits mailing list