[llvm-commits] [llvm] r68961 - in /llvm/trunk: include/llvm/Target/Target.td include/llvm/Target/TargetInstrInfo.h include/llvm/Target/TargetRegisterInfo.h lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp utils/TableGen/CodeEmitterGen.cpp utils/TableGen/CodeGenDAGPatterns.cpp utils/TableGen/CodeGenTarget.cpp utils/TableGen/DAGISelEmitter.cpp utils/TableGen/InstrInfoEmitter.cpp utils/TableGen/RegisterInfoEmitter.cpp

[Dan Gohman]

On Apr 13, 2009, at 9:23 AM, Jakob Stoklund Olesen wrote:

>
> On 13/04/2009, at 17.38, Dan Gohman wrote:
>
>> Author: djg
>> Date: Mon Apr 13 10:38:05 2009
>> New Revision: 68961
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=68961&view=rev
>> Log:
>> Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
>> This will be used to replace things like X86's MOV32to32_.
>
> Very nice. I wonder, is it necessary to restrict to subclasses? My
> Blackfin target has disjoint register classes, but I can still copy
> between them. COPY_TO_REGCLASS?

With the register class enhancement changes that accompanied this
change, the code that expands post-isel SDNodes into MachineInstrs
now automatically inserts copies when needed to bridge between
different register classes.  COPY_TO_SUBCLASS is only needed in
situations where the the register class of the virtual registers
needs to be something other than what the instruction patterns
indicate they require.

Can you give an example of a pattern where this would be used?

Dan