[llvm-commits] [llvm] r68890 - in /llvm/trunk: lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll

Chris Lattner sabre at nondot.org
Sun Apr 12 00:51:15 PDT 2009


Author: lattner
Date: Sun Apr 12 02:51:14 2009
New Revision: 68890

URL: http://llvm.org/viewvc/llvm-project?rev=68890&view=rev
Log:
fix a cross-block fastisel crash handling overflow intrinsics.
See comment for details.  This fixes rdar://6772169

Added:
    llvm/trunk/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
Modified:
    llvm/trunk/lib/Target/X86/X86FastISel.cpp

Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=68890&r1=68889&r2=68890&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Sun Apr 12 02:51:14 2009
@@ -809,8 +809,8 @@
           unsigned OpCode = SetMI->getOpcode();
 
           if (OpCode == X86::SETOr || OpCode == X86::SETBr) {
-            BuildMI(MBB, DL, TII.get((OpCode == X86::SETOr) ? 
-                                 X86::JO : X86::JB)).addMBB(TrueMBB);
+            BuildMI(MBB, DL, TII.get(OpCode == X86::SETOr ? X86::JO : X86::JB))
+              .addMBB(TrueMBB);
             FastEmitBranch(FalseMBB);
             MBB->addSuccessor(TrueMBB);
             return true;
@@ -1072,9 +1072,20 @@
 
     unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
     BuildMI(MBB, DL, TII.get(OpC), ResultReg).addReg(Reg1).addReg(Reg2);
-    UpdateValueMap(&I, ResultReg);
+    unsigned DestReg1 = UpdateValueMap(&I, ResultReg);
 
-    ResultReg = createResultReg(TLI.getRegClassFor(MVT::i8));
+    // If the add with overflow is an intra-block value then we just want to
+    // create temporaries for it like normal.  If it is a cross-block value then
+    // UpdateValueMap will return the cross-block register used.  Since we
+    // *really* want the value to be live in the register pair known by
+    // UpdateValueMap, we have to use DestReg1+1 as the destination register in
+    // the cross block case.  In the non-cross-block case, we should just make
+    // another register for the value.
+    if (DestReg1 != ResultReg)
+      ResultReg = DestReg1+1;
+    else
+      ResultReg = createResultReg(TLI.getRegClassFor(MVT::i8));
+    
     unsigned Opc = X86::SETBr;
     if (I.getIntrinsicID() == Intrinsic::sadd_with_overflow)
       Opc = X86::SETOr;

Added: llvm/trunk/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll?rev=68890&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll Sun Apr 12 02:51:14 2009
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -fast-isel
+; radr://6772169
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10"
+	type { i32, i1 }		; type %0
+
+declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind
+
+define fastcc i32 @test() nounwind {
+entry:
+	%tmp1 = call %0 @llvm.sadd.with.overflow.i32(i32 1, i32 0)
+	%tmp2 = extractvalue %0 %tmp1, 1
+	br i1 %tmp2, label %.backedge, label %BB3
+
+BB3:
+	%tmp4 = extractvalue %0 %tmp1, 0
+	br label %.backedge
+
+.backedge:
+	ret i32 0
+}





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