[llvm-commits] [llvm] r67739 - /llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp

[Chris Lattner]

Author: lattner
Date: Thu Mar 26 00:29:34 2009
New Revision: 67739

URL: http://llvm.org/viewvc/llvm-project?rev=67739&view=rev
Log:
fix warning in -asserts mode.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=67739&r1=67738&r2=67739&view=diff

==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Thu Mar 26 00:29:34 2009
@@ -1503,7 +1503,6 @@
     return SDValue();   // Wasn't a constant vector or splat exceeded min
 
   uint64_t SplatBits = APSplatBits.getZExtValue();
-  unsigned SplatSize = SplatBitSize / 8;
 
   switch (VT.getSimpleVT()) {
   default:
@@ -1514,17 +1513,17 @@
     /*NOTREACHED*/
   case MVT::v4f32: {
     uint32_t Value32 = uint32_t(SplatBits);
-    assert(SplatSize == 4
+    assert(SplatBitSize == 32
            && "LowerBUILD_VECTOR: Unexpected floating point vector element.");
     // NOTE: pretend the constant is an integer. LLVM won't load FP constants
     SDValue T = DAG.getConstant(Value32, MVT::i32);
     return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::v4f32,
-                       DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, T, T, T, T));
+                       DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, T,T,T,T));
     break;
   }
   case MVT::v2f64: {
     uint64_t f64val = uint64_t(SplatBits);
-    assert(SplatSize == 8
+    assert(SplatBitSize == 64
            && "LowerBUILD_VECTOR: 64-bit float vector size > 8 bytes.");
     // NOTE: pretend the constant is an integer. LLVM won't load FP constants
     SDValue T = DAG.getConstant(f64val, MVT::i64);