[llvm-commits] [llvm] r63090 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/smul-with-overflow-2.ll

Evan Cheng evan.cheng at apple.com
Mon Jan 26 19:30:42 PST 2009


Author: evancheng
Date: Mon Jan 26 21:30:42 2009
New Revision: 63090

URL: http://llvm.org/viewvc/llvm-project?rev=63090&view=rev
Log:
Implement multiple with overflow by 2 with an add instruction.

Added:
    llvm/trunk/test/CodeGen/X86/smul-with-overflow-2.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=63090&r1=63089&r2=63090&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Jan 26 21:30:42 2009
@@ -3612,6 +3612,17 @@
                     (implicit EFLAGS)),
           (IMUL32rmi8 addr:$src1, i32immSExt8:$src2)>;
 
+// Optimize multiple with overflow by 2.
+let AddedComplexity = 2 in {
+def : Pat<(parallel (X86smul_ovf GR16:$src1, 2),
+                    (implicit EFLAGS)),
+          (ADD16rr GR16:$src1, GR16:$src1)>;
+
+def : Pat<(parallel (X86smul_ovf GR32:$src1, 2),
+                    (implicit EFLAGS)),
+          (ADD32rr GR32:$src1, GR32:$src1)>;
+}
+
 //===----------------------------------------------------------------------===//
 // Floating Point Stack Support
 //===----------------------------------------------------------------------===//

Added: llvm/trunk/test/CodeGen/X86/smul-with-overflow-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/smul-with-overflow-2.ll?rev=63090&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/smul-with-overflow-2.ll (added)
+++ llvm/trunk/test/CodeGen/X86/smul-with-overflow-2.ll Mon Jan 26 21:30:42 2009
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 1
+; RUN: llvm-as < %s | llc -march=x86 | grep add | count 3
+
+define i32 @t1(i32 %a, i32 %b) nounwind readnone {
+entry:
+        %tmp0 = add i32 %b, %a
+	%tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 2)
+	%tmp2 = extractvalue { i32, i1 } %tmp1, 0
+	ret i32 %tmp2
+}
+
+define i32 @t2(i32 %a, i32 %b) nounwind readnone {
+entry:
+        %tmp0 = add i32 %b, %a
+	%tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 4)
+	%tmp2 = extractvalue { i32, i1 } %tmp1, 0
+	ret i32 %tmp2
+}
+
+declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind





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