[llvm-commits] [llvm] r63027 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp

Anton Korobeynikov asl at math.spbu.ru
Mon Jan 26 11:26:02 PST 2009


Author: asl
Date: Mon Jan 26 13:26:01 2009
New Revision: 63027

URL: http://llvm.org/viewvc/llvm-project?rev=63027&view=rev
Log:
During bittest switch lowering emit shift in the test block, which should (theoretically)
allow us to generate more efficient code. We don't do this now though :)

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=63027&r1=63026&r2=63027&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Mon Jan 26 13:26:01 2009
@@ -1416,14 +1416,8 @@
   else
     ShiftOp = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), SUB);
 
-  // Make desired shift
-  SDValue SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
-                                  DAG.getConstant(1, TLI.getPointerTy()),
-                                  ShiftOp);
-
-  unsigned SwitchReg = FuncInfo.MakeReg(TLI.getPointerTy());
-  SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), SwitchReg, SwitchVal);
-  B.Reg = SwitchReg;
+  B.Reg = FuncInfo.MakeReg(TLI.getShiftAmountTy());
+  SDValue CopyTo = DAG.getCopyToReg(getControlRoot(), B.Reg, ShiftOp);
 
   // Set NextBlock to be the MBB immediately after the current one, if any.
   // This is used to avoid emitting unnecessary branches to the next block.
@@ -1453,10 +1447,14 @@
 void SelectionDAGLowering::visitBitTestCase(MachineBasicBlock* NextMBB,
                                             unsigned Reg,
                                             BitTestCase &B) {
-  // Emit bit tests and jumps
-  SDValue SwitchVal = DAG.getCopyFromReg(getControlRoot(), Reg,
-                                           TLI.getPointerTy());
+  // Make desired shift
+  SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), Reg,
+                                       TLI.getShiftAmountTy());
+  SDValue SwitchVal = DAG.getNode(ISD::SHL, TLI.getPointerTy(),
+                                  DAG.getConstant(1, TLI.getPointerTy()),
+                                  ShiftOp);
 
+  // Emit bit tests and jumps
   SDValue AndOp = DAG.getNode(ISD::AND, TLI.getPointerTy(), SwitchVal,
                               DAG.getConstant(B.Mask, TLI.getPointerTy()));
   SDValue AndCmp = DAG.getSetCC(TLI.getSetCCResultType(AndOp.getValueType()),





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