[llvm-commits] [llvm] r62730 - /llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

[Dan Gohman]

Author: djg
Date: Wed Jan 21 17:40:54 2009
New Revision: 62730

URL: http://llvm.org/viewvc/llvm-project?rev=62730&view=rev
Log:
Recognize inline asm for bswap on x86-64 GLIBC. This allows it
to be supported in the JIT.

Modified:
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=62730&r1=62729&r2=62730&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Wed Jan 21 17:40:54 2009
@@ -411,11 +411,21 @@
 
     // bswap $0
     if (AsmPieces.size() == 2 &&
-        AsmPieces[0] == "bswap" && AsmPieces[1] == "$0") {
+        AsmPieces[0] == "bswap" && (AsmPieces[1] == "$0" ||
+                                    AsmPieces[1] == "${0:q}")) {
       // No need to check constraints, nothing other than the equivalent of
       // "=r,0" would be valid here.
       return LowerToBSwap(CI);
     }
+    // rorw $$8, ${0:w}  -->  llvm.bswap.i16
+    if (CI->getType() == Type::Int16Ty &&
+        AsmPieces.size() == 3 &&
+        AsmPieces[0] == "rorw" &&
+        AsmPieces[1] == "$$8," &&
+        AsmPieces[2] == "${0:w}" &&
+        IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") {
+      return LowerToBSwap(CI);
+    }
     break;
   case 3:
     if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&