[llvm-commits] [llvm] r61665 - /llvm/trunk/test/CodeGen/CellSPU/i8ops.ll

Scott Michel scottm at aero.org
Sun Jan 4 17:35:22 PST 2009


Author: pingbak
Date: Sun Jan  4 19:35:22 2009
New Revision: 61665

URL: http://llvm.org/viewvc/llvm-project?rev=61665&view=rev
Log:
CellSPU:
- Add an 8-bit operation test, which doesn't do much at this point.

Added:
    llvm/trunk/test/CodeGen/CellSPU/i8ops.ll

Added: llvm/trunk/test/CodeGen/CellSPU/i8ops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/i8ops.ll?rev=61665&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/i8ops.ll (added)
+++ llvm/trunk/test/CodeGen/CellSPU/i8ops.ll Sun Jan  4 19:35:22 2009
@@ -0,0 +1,25 @@
+; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+
+; ModuleID = 'i8ops.bc'
+target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
+target triple = "spu"
+
+define i8 @add_i8(i8 %a, i8 %b) nounwind {
+  %1 = add i8 %a, %b
+  ret i8 %1
+}
+
+define i8 @add_i8_imm(i8 %a, i8 %b) nounwind {
+  %1 = add i8 %a, 15 
+  ret i8 %1
+}
+
+define i8 @sub_i8(i8 %a, i8 %b) nounwind {
+  %1 = sub i8 %a, %b
+  ret i8 %1
+}
+
+define i8 @sub_i8_imm(i8 %a, i8 %b) nounwind {
+  %1 = sub i8 %a, 15 
+  ret i8 %1
+}





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