[llvm-commits] [llvm] r61341 - /llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h

Dan Gohman gohman at apple.com
Mon Dec 22 13:06:21 PST 2008


Author: djg
Date: Mon Dec 22 15:06:20 2008
New Revision: 61341

URL: http://llvm.org/viewvc/llvm-project?rev=61341&view=rev
Log:
Add an assertion to catch SUnits reallocations. And add a doxygen
comment for the ScheduleDAGSDNodes class.

Modified:
    llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h

Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h?rev=61341&r1=61340&r2=61341&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAGSDNodes.h Mon Dec 22 15:06:20 2008
@@ -59,6 +59,20 @@
     virtual void EmitNoop() {}
   };
 
+  /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs.
+  /// 
+  /// Edges between SUnits are initially based on edges in the SelectionDAG,
+  /// and additional edges can be added by the schedulers as heuristics.
+  /// SDNodes such as Constants, Registers, and a few others that are not
+  /// interesting to schedulers are not allocated SUnits.
+  ///
+  /// SDNodes with MVT::Flag operands are grouped along with the flagged
+  /// nodes into a single SUnit so that they are scheduled together.
+  ///
+  /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
+  /// edges.  Physical register dependence information is not carried in
+  /// the DAG and must be handled explicitly by schedulers.
+  ///
   class ScheduleDAGSDNodes : public ScheduleDAG {
   public:
     SmallSet<SDNode*, 16> CommuteSet;     // Nodes that should be commuted.
@@ -88,7 +102,11 @@
     /// NewSUnit - Creates a new SUnit and return a ptr to it.
     ///
     SUnit *NewSUnit(SDNode *N) {
+#ifndef NDEBUG
+      const SUnit *Addr = &SUnits[0];
+#endif
       SUnits.push_back(SUnit(N, (unsigned)SUnits.size()));
+      assert(Addr == &SUnits[0] && "SUnits std::vector reallocated on the fly!");
       SUnits.back().OrigNode = &SUnits.back();
       return &SUnits.back();
     }





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