[llvm-commits] [llvm] r61013 - /llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td

[Chris Lattner]

Author: lattner
Date: Sun Dec 14 15:37:33 2008
New Revision: 61013

URL: http://llvm.org/viewvc/llvm-project?rev=61013&view=rev
Log:
silence warning when asserts disabled.

Modified:
    llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td

Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=61013&r1=61012&r2=61013&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Sun Dec 14 15:37:33 2008
@@ -861,6 +861,7 @@
 //An ugly trick to get the opcode as an imm I can use
 def immBRCond : SDNodeXForm<imm, [{
   switch((uint64_t)N->getZExtValue()) {
+    default: assert(0 && "Unknown branch type");
     case 0:  return getI64Imm(Alpha::BEQ);
     case 1:  return getI64Imm(Alpha::BNE);
     case 2:  return getI64Imm(Alpha::BGE);
@@ -875,7 +876,6 @@
     case 23: return getI64Imm(Alpha::FBGT);
     case 24: return getI64Imm(Alpha::FBLE);
     case 25: return getI64Imm(Alpha::FBLT);
-    default: assert(0 && "Unknown branch type");
   }
 }]>;