[llvm-commits] [llvm] r60277 - in /llvm/trunk: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/CellSPU/icmp16.ll test/CodeGen/X86/2008-11-29-ULT-Sign.ll

Eli Friedman eli.friedman at gmail.com
Sat Nov 29 20:59:26 PST 2008


Author: efriedma
Date: Sat Nov 29 22:59:26 2008
New Revision: 60277

URL: http://llvm.org/viewvc/llvm-project?rev=60277&view=rev
Log:
APIntify a test which is potentially unsafe otherwise, and fix the 
nearby FIXME.

I'm not sure what the right way to fix the Cell test was; if the 
approach I used isn't okay, please let me know.


Added:
    llvm/trunk/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    llvm/trunk/test/CodeGen/CellSPU/icmp16.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=60277&r1=60276&r2=60277&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sat Nov 29 22:59:26 2008
@@ -1583,12 +1583,19 @@
       // by changing cc.
 
       // SETUGT X, SINTMAX  -> SETLT X, 0
-      if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
-          C1 == (~0ULL >> (65-OperandBitSize)))
+      if (Cond == ISD::SETUGT && 
+          C1 == APInt::getSignedMaxValue(OperandBitSize))
         return DAG.getSetCC(VT, N0, DAG.getConstant(0, N1.getValueType()),
                             ISD::SETLT);
 
-      // FIXME: Implement the rest of these.
+      // SETULT X, SINTMIN  -> SETGT X, -1
+      if (Cond == ISD::SETULT &&
+          C1 == APInt::getSignedMinValue(OperandBitSize)) {
+        SDValue ConstMinusOne =
+            DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
+                            N1.getValueType());
+        return DAG.getSetCC(VT, N0, ConstMinusOne, ISD::SETGT);
+      }
 
       // Fold bit comparisons when we can.
       if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&

Modified: llvm/trunk/test/CodeGen/CellSPU/icmp16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/icmp16.ll?rev=60277&r1=60276&r2=60277&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/icmp16.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/icmp16.ll Sat Nov 29 22:59:26 2008
@@ -204,7 +204,7 @@
 
 define i16 @icmp_ult_immed04_i16(i16 %arg1, i16 %val1, i16 %val2) nounwind {
 entry:
-       %A = icmp ult i16 %arg1, 32768
+       %A = icmp ult i16 %arg1, 32769
        %B = select i1 %A, i16 %val1, i16 %val2
        ret i16 %B
 }

Added: llvm/trunk/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-11-29-ULT-Sign.ll?rev=60277&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-11-29-ULT-Sign.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-11-29-ULT-Sign.ll Sat Nov 29 22:59:26 2008
@@ -0,0 +1,22 @@
+; RUN:  llvm-as < %s | llc -mtriple=i686-pc-linux-gnu | grep "jns" | count 1
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
+target triple = "i686-pc-linux-gnu"
+
+define i32 @a(i32 %x) nounwind {
+entry:
+	%cmp = icmp ult i32 %x, -2147483648		; <i1> [#uses=1]
+	br i1 %cmp, label %if.end, label %if.then
+
+if.then:		; preds = %entry
+	%call = call i32 (...)* @b()		; <i32> [#uses=0]
+	br label %if.end
+
+if.end:		; preds = %if.then, %entry
+	br label %return
+
+return:		; preds = %if.end
+	ret i32 undef
+}
+
+declare i32 @b(...)
+





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