[llvm-commits] [llvm] r59070 - /llvm/trunk/docs/WritingAnLLVMBackend.html

Chris Lattner sabre at nondot.org
Tue Nov 11 11:35:16 PST 2008


Author: lattner
Date: Tue Nov 11 13:35:15 2008
New Revision: 59070

URL: http://llvm.org/viewvc/llvm-project?rev=59070&view=rev
Log:
fix some validation errors <it> -> <i>

Modified:
    llvm/trunk/docs/WritingAnLLVMBackend.html

Modified: llvm/trunk/docs/WritingAnLLVMBackend.html
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/WritingAnLLVMBackend.html?rev=59070&r1=59069&r2=59070&view=diff

==============================================================================
--- llvm/trunk/docs/WritingAnLLVMBackend.html (original)
+++ llvm/trunk/docs/WritingAnLLVMBackend.html Tue Nov 11 13:35:15 2008
@@ -103,7 +103,7 @@
 a reference manual for the LLVM assembly language
 </li>
 <li>
-<it><a href="http://www.llvm.org/docs/CodeGenerator.html">The LLVM Target-Independent Code Generator </a></it> - 
+<i><a href="http://www.llvm.org/docs/CodeGenerator.html">The LLVM Target-Independent Code Generator </a></i> - 
 a guide to the components (classes and code generation algorithms) for translating 
 the LLVM internal representation to the machine code for a specified target. 
 Pay particular attention to the descriptions of code generation stages: 
@@ -112,24 +112,24 @@
 and Code Emission. 
 </li>
 <li>
-<it><a href="http://www.llvm.org/docs/TableGenFundamentals.html">TableGen Fundamentals</a></it> - 
+<i><a href="http://www.llvm.org/docs/TableGenFundamentals.html">TableGen Fundamentals</a></i> - 
 a document that describes the TableGen (tblgen) application that manages domain-specific 
 information to support LLVM code generation. TableGen processes input from a 
 target description file (.td suffix) and generates C++ code that can be used 
 for code generation.
 </li>
 <li>
-<it><a href="http://www.llvm.org/docs/WritingAnLLVMPass.html">Writing an LLVM Pass</a></it> - 
+<i><a href="http://www.llvm.org/docs/WritingAnLLVMPass.html">Writing an LLVM Pass</a></i> - 
 The assembly printer is a FunctionPass, as are several SelectionDAG processing steps.
 </li>
 </ul>
 To follow the SPARC examples in this document, have a copy of 
-<it><a href="http://www.sparc.org/standards/V8.pdf">The SPARC Architecture Manual, Version 8</a></it> 
+<i><a href="http://www.sparc.org/standards/V8.pdf">The SPARC Architecture Manual, Version 8</a></i> 
 for reference. For details about the ARM instruction set, refer to the 
-<it><a href="http://infocenter.arm.com/">ARM Architecture Reference Manual</a></it>
+<i><a href="http://infocenter.arm.com/">ARM Architecture Reference Manual</a></i>
 For more about the GNU Assembler format (GAS), see 
-<it><a href="http://sourceware.org/binutils/docs/as/index.html">Using As</a></it>
-especially for the assembly printer. <it>Using As</it> contains lists of target machine dependent features. 
+<i><a href="http://sourceware.org/binutils/docs/as/index.html">Using As</a></i>
+especially for the assembly printer. <i>Using As</i> contains lists of target machine dependent features. 
 </div>
 
 <div class="doc_subsection">





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