[llvm-commits] [llvm] r58043 - in /llvm/trunk/lib/Target/PowerPC: PPCInstr64Bit.td PPCInstrInfo.td
Dale Johannesen
dalej at apple.com
Thu Oct 23 13:41:29 PDT 2008
Author: johannes
Date: Thu Oct 23 15:41:28 2008
New Revision: 58043
URL: http://llvm.org/viewvc/llvm-project?rev=58043&view=rev
Log:
Mark defs and uses of CTR and LR correctly.
Prevents DeadMachineInstructionElim from thinking
things like MTCTR are dead (fixes massive
testsuite breakage at -O0).
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=58043&r1=58042&r2=58043&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Thu Oct 23 15:41:28 2008
@@ -76,10 +76,12 @@
def BLA8_Macho : IForm<18, 1, 1,
(outs), (ins aaddr:$func, variable_ops),
"bla $func", BrB, [(PPCcall_Macho (i64 imm:$func))]>;
- def BCTRL8_Macho : XLForm_2_ext<19, 528, 20, 0, 1,
+ let Uses = [CTR8] in {
+ def BCTRL8_Macho : XLForm_2_ext<19, 528, 20, 0, 1,
(outs), (ins variable_ops),
"bctrl", BrB,
[(PPCbctrl_Macho)]>, Requires<[In64BitMode]>;
+ }
}
// ELF 64 ABI Calls = Macho ABI Calls
@@ -98,10 +100,12 @@
def BLA8_ELF : IForm<18, 1, 1,
(outs), (ins aaddr:$func, variable_ops),
"bla $func", BrB, [(PPCcall_ELF (i64 imm:$func))]>;
- def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1,
+ let Uses = [CTR8] in {
+ def BCTRL8_ELF : XLForm_2_ext<19, 528, 20, 0, 1,
(outs), (ins variable_ops),
"bctrl", BrB,
[(PPCbctrl_ELF)]>, Requires<[In64BitMode]>;
+ }
}
@@ -186,7 +190,7 @@
let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
- isIndirectBranch = 1, isCall = 1, isReturn = 1 in
+ isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR] in
def TAILBCTR8 : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>,
Requires<[In64BitMode]>;
@@ -218,10 +222,12 @@
//===----------------------------------------------------------------------===//
// 64-bit SPR manipulation instrs.
+let Uses = [CTR8] in {
def MFCTR8 : XFXForm_1_ext<31, 339, 9, (outs G8RC:$rT), (ins),
"mfctr $rT", SprMFSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
-let Pattern = [(PPCmtctr G8RC:$rS)] in {
+}
+let Pattern = [(PPCmtctr G8RC:$rS)], Defs = [CTR8] in {
def MTCTR8 : XFXForm_7_ext<31, 467, 9, (outs), (ins G8RC:$rS),
"mtctr $rS", SprMTSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
@@ -233,13 +239,16 @@
[(set G8RC:$result,
(PPCdynalloc G8RC:$negsize, iaddr:$fpsi))]>;
+let Defs = [LR8] in {
def MTLR8 : XFXForm_7_ext<31, 467, 8, (outs), (ins G8RC:$rS),
"mtlr $rS", SprMTSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
+}
+let Uses = [LR8] in {
def MFLR8 : XFXForm_1_ext<31, 339, 8, (outs G8RC:$rT), (ins),
"mflr $rT", SprMFSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
-
+}
//===----------------------------------------------------------------------===//
// Fixed point instructions.
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=58043&r1=58042&r2=58043&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Thu Oct 23 15:41:28 2008
@@ -385,11 +385,11 @@
"${:comment} SPILL_CR $cond $F", []>;
let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in {
- let isReturn = 1 in
+ let isReturn = 1, Uses = [LR] in
def BLR : XLForm_2_br<19, 16, 0, (outs), (ins pred:$p),
"b${p:cc}lr ${p:reg}", BrB,
[(retflag)]>;
- let isBranch = 1, isIndirectBranch = 1 in
+ let isBranch = 1, isIndirectBranch = 1, Uses = [CTR] in
def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>;
}
@@ -429,10 +429,12 @@
def BLA_Macho : IForm<18, 1, 1,
(outs), (ins aaddr:$func, variable_ops),
"bla $func", BrB, [(PPCcall_Macho (i32 imm:$func))]>;
- def BCTRL_Macho : XLForm_2_ext<19, 528, 20, 0, 1,
+ let Uses = [CTR] in {
+ def BCTRL_Macho : XLForm_2_ext<19, 528, 20, 0, 1,
(outs), (ins variable_ops),
"bctrl", BrB,
[(PPCbctrl_Macho)]>, Requires<[In32BitMode]>;
+ }
}
// ELF ABI Calls.
@@ -453,10 +455,12 @@
(outs), (ins aaddr:$func, variable_ops),
"bla $func", BrB,
[(PPCcall_ELF (i32 imm:$func))]>;
- def BCTRL_ELF : XLForm_2_ext<19, 528, 20, 0, 1,
+ let Uses = [CTR] in {
+ def BCTRL_ELF : XLForm_2_ext<19, 528, 20, 0, 1,
(outs), (ins variable_ops),
"bctrl", BrB,
[(PPCbctrl_ELF)]>, Requires<[In32BitMode]>;
+ }
}
@@ -479,7 +483,7 @@
let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1,
- isIndirectBranch = 1, isCall = 1, isReturn = 1 in
+ isIndirectBranch = 1, isCall = 1, isReturn = 1, Uses = [CTR] in
def TAILBCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>,
Requires<[In32BitMode]>;
@@ -1056,21 +1060,27 @@
// XFX-Form instructions. Instructions that deal with SPRs.
//
+let Uses = [CTR] in {
def MFCTR : XFXForm_1_ext<31, 339, 9, (outs GPRC:$rT), (ins),
"mfctr $rT", SprMFSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
-let Pattern = [(PPCmtctr GPRC:$rS)] in {
+}
+let Defs = [CTR], Pattern = [(PPCmtctr GPRC:$rS)] in {
def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins GPRC:$rS),
"mtctr $rS", SprMTSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
}
+let Defs = [LR] in {
def MTLR : XFXForm_7_ext<31, 467, 8, (outs), (ins GPRC:$rS),
"mtlr $rS", SprMTSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
+}
+let Uses = [LR] in {
def MFLR : XFXForm_1_ext<31, 339, 8, (outs GPRC:$rT), (ins),
"mflr $rT", SprMFSPR>,
PPC970_DGroup_First, PPC970_Unit_FXU;
+}
// Move to/from VRSAVE: despite being a SPR, the VRSAVE register is renamed like
// a GPR on the PPC970. As such, copies in and out have the same performance
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